- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄24675 > 935262342026 (NXP SEMICONDUCTORS) LIQUID CRYSTAL DISPLAY DRIVER, UUC54 PDF資料下載
參數(shù)資料
| 型號： | 935262342026 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 顯示驅(qū)動器 |
| 英文描述： | LIQUID CRYSTAL DISPLAY DRIVER, UUC54 |
| 封裝： | DIE-54 |
| 文件頁數(shù)： | 46/46頁 |
| 文件大?。?/td> | 287K |
| 代理商： | 935262342026 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁當(dāng)前第46頁
1998 Sep 08
9
Philips Semiconductors
Product specication
LCD row/column driver for dot matrix
graphic displays
PCF8578
7.3
Multiplexed LCD bias generation
The bias levels required to produce maximum contrast
depend on the multiplex rate and the LCD threshold
voltage (Vth). Vth is typically defined as the RMS voltage at
which the LCD exhibits 10% contrast. Table 2 shows the
optimum voltage bias levels for the PCF8578 as functions
of Vop (Vop =VDD VLCD), together with the discrimination
ratios (D) for the different multiplex rates. A practical value
for Vop is obtained by equating Voff(rms) with Vth. Figure 4
shows the first 4 rows of Table 2 as graphs. Table 3 shows
the relative values of the resistors required in the
configuration of Fig.5 to produce the standard multiplex
rates.
Table 2
Optimum LCD voltages
Table 3
Multiplex rates and resistor values for Fig.5
PARAMETER
MULTIPLEX RATE
1:8
1:16
1:24
1:32
0.739
0.800
0.830
0.850
0.522
0.600
0.661
0.700
0.478
0.400
0.339
0.300
0.261
0.200
0.170
0.150
0.297
0.245
0.214
0.193
0.430
0.316
0.263
0.230
1.447
1.291
1.230
1.196
3.370
4.080
4.680
5.190
RESISTORS
MULTIPLEX RATE (n)
n = 8
n = 16, 24, 32
R1
R
R2
R
R3
V
2
V
op
---------
V
3
V
op
---------
V
4
V
op
---------
V
5
V
op
---------
V
off rms
()
V
op
-----------------------
V
on rms
()
V
op
-----------------------
D
V
on rms
()
V
off rms
()
-----------------------
=
V
op
V
th
---------
n2
–
() R
3n
–
() R
n3
–
() R
7.4
Power-on reset
At power-on the PCF8578 resets to a defined starting
condition as follows:
1. Display blank
2. 1 : 32 multiplex rate, row mode
3. Start bank, 0 selected
4. Data pointer is set to X, Y address 0, 0
5. Character mode
6. Subaddress counter is set to 0
7. I2C-bus interface is initialized.
Data transfers on the I2C-bus should be avoided for 1 ms
following power-on, to allow completion of the reset action.
Fig.4
Vbias/Vop as a function of the multiplex rate.
1:8
1:16
1:32
1.0
0
0.8
MSA838
1:24
0.6
0.4
0.2
multiplex rate
V bias
Vop
V5
V4
V3
V2
Vbias =V2, V3, V4, V5. See Table 2.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 0570-2004-01 | LINE FILTER INDUCTORS |
| 0570-2004-02 | LINE FILTER INDUCTORS |
| 0570-2004-03 | LINE FILTER INDUCTORS |
| 0570-2004-04 | LINE FILTER INDUCTORS |
| 0570-2004-05 | LINE FILTER INDUCTORS |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 935264217557 | 制造商:NXP Semiconductors 功能描述:SUB ONLY IC |
| 935267356112 | 制造商:NXP Semiconductors 功能描述:IC TEA1507PN |
| 935268081112 | 制造商:NXP Semiconductors 功能描述:SUB ONLY IC |
| 935268721125 | 制造商:NXP Semiconductors 功能描述:Buffer/Line Driver 1-CH Non-Inverting 3-ST CMOS 5-Pin TSSOP T/R |
| 935269304128 | 制造商:ST-Ericsson 功能描述:IC AUDIO CODEC W/TCH SCRN 48LQFP |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。