參數(shù)資料
型號(hào)： 935262342026
廠商： NXP SEMICONDUCTORS
元件分類： 顯示驅(qū)動(dòng)器
英文描述： LIQUID CRYSTAL DISPLAY DRIVER, UUC54
封裝： DIE-54
文件頁數(shù)： 21/46頁
文件大?。?/td> 287K
代理商： 935262342026
1998 Sep 08
28
Philips Semiconductors
Product specication
LCD row/column driver for dot matrix
graphic displays
PCF8578
13 AC CHARACTERISTICS
All timing values are referenced to VIH and VIL levels with an input voltage swing of VSS to VDD.
VDD = 2.5 to 6 V; VSS =0V; VLCD =VDD 3.5 V to VDD 9 V; Tamb = 40 to +85 °C; unless otherwise specied.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
fCLK1
clock frequency at multiplex rates of
1 : 8, 1 : 16 and 1 : 32
ROSC = 330 k; VDD = 6 V
1.2
2.1
3.3
kHz
fCLK2
clock frequency at multiplex rates of
1:24
ROSC = 330 k; VDD = 6 V
0.9
1.6
2.5
kHz
tPSYNC
SYNC propagation delay
500
ns
tPLCD
driver delays
VDD VLCD =9V;
with test loads
100
s
I2C-bus
fSCL
SCL clock frequency
100
kHz
tSW
tolerable spike width on bus
100
ns
tBUF
bus free time
4.7
s
tSU;STA
start condition set-up time
repeated start codes only
4.7
s
tHD;STA
start condition hold time
4.0
s
tLOW
SCL LOW time
4.7
s
tHIGH
SCL HIGH time
4.0
s
tr
SCL and SDA rise time
1
s
tf
SCL and SDA fall time
0.3
s
tSU;DAT
data set-up time
250
ns
tHD;DAT
data hold time
0
ns
tSU;STO
stop condition set-up time
4.0
s
Fig.19 AC test loads.
MSA829
3.3 k
1.5 k
0.5 VDD
VDD
SDA
SYNC, CLK
1 nF
C39 to C32,
R31/C31 to R8/C8
and R7 to R0
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