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參數(shù)資料
| 型號： | 935261615112 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PDSO28 |
| 封裝： | 7.50 MM, PLASTIC, SO-28 |
| 文件頁數(shù)： | 6/48頁 |
| 文件大?。?/td> | 356K |
| 代理商： | 935261615112 |
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1998 Oct 06
14
Philips Semiconductors
Preliminary specication
Universal Serial Bus (USB)
Digital-to-Analog Converter (DAC)
UDA1321
Table 3
Volume control characteristics; note 1
Note
1. The volume control characteristics of this table are in accordance with the latest Audio Device Class Definition.
The volume control characteristics of the UDA1321/N101 are slightly different; see Chapter “USB-DAC
UDA1321/N101 (Firmware sw 2.1.1.7)”
wVOLUME
VOLUME USB SIDE
(dB)
VOLUME USB DAC
(dB)
B15
B14
B13
B12
B11
B10
B9
B8
00000000
0
11111111
1
11111110
2
11111101
3
11111100
4
11111011
5
11111010
6
11111001
7
11111000
8
11110111
9
11110110
10
...
11000101
59
11000100
60
11000011
61
∞
11000010
62
∞
...
10000000
∞
MUTE CONTROL
Mute is one of the sound features as defined in the
“USB
Device Class Definition for Audio Devices”. The mute
control request data bMute controls the position of the
mute switch. The position can be either on or off. When
bMute is true the feature unit is muted. When bMute is
false the feature unit is not muted.
When the mute is active for the master channel, the value
of the sample is decreased smoothly to zero following a
raised cosine curve. There are 32 coefficients used to step
down the value of the data, each one being used 32 times
before stepping to the next.
This amounts to a mute transition of 23 ms at
fs = 44.1 kHz. When the mute is released, the samples are
returned to the full level again following a raised cosine
curve with the same coefficients being used in reversed
order. The mute, on the master channel is synchronized to
the sample clock, so that operation always takes place on
complete samples.
A mute can be given via the host or by pressing a
predefined GP pin.
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