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參數(shù)資料
| 型號： | 935206130112 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | PLD |
| 英文描述： | OT PLD, 35 ns, PDSO20 |
| 封裝： | 4.40 MM, PLASTIC, MO-153AC, SOT-360-1, TSSOP-20 |
| 文件頁數(shù)： | 12/23頁 |
| 文件大?。?/td> | 225K |
| 代理商： | 935206130112 |
Philips Semiconductors
Product specification
PLC18V8Z
Zero standby power
CMOS versatile PAL devices
2
1997 Aug 08
853–2016 18258
DESCRIPTION
The PLC18V8Z is a universal PAL
device featuring high
performance and virtually zero-standby power for power sensitive
applications. They are reliable, user-configurable substitutes for
discrete TTL/CMOS logic. While compatible with TTL and HCT
logic, the PLC18V8Z can also replace HC logic over the VCC range
of 4.5 to 5.5V.
The PLC18V8Z is a two-level logic element comprised of 10 inputs,
74 AND gates (product terms) and 8 output Macro cells.
Each output features an “Output Macro Cell” which can be
individually configured as a dedicated input, a combinatorial output,
or a registered output with internal feedback. As a result, the
PLC18V8Z is capable of emulating all common 20-pin PAL devices
to reduce documentation, inventory, and manufacturing costs.
A power-up reset function and a Register Preload function have
been incorporated in the PLC18V8Z architecture to facilitate state
machine design and testing.
With a standby current of less than 100
A and active power
consumption of 1.5mA/MHz, the PLC18V8Z is ideally suited for
power sensitive applications in battery operated/backed portable
instruments and computers.
The PLC18V8Z is also processed to industrial requirements for
operation over an extended temperature range of -40
°C to +85°C
and supply voltage of 4.5V to 5.5V.
Ordering information can be found on the following page.
FEATURES
20-pin Universal Programmable Array Logic
Virtually Zero-Standby-power
– 20
A (typical)
Available in DIP, PLCC, SOL (Small Outline), SSOP (Shrink Small
Outline), and TSSOP (Thin Shrink Small Outline) packages
Functional replacement for Series 20 PAL devices
– IOL = 24mA
Up to 18 inputs and 8 input/output macro cells
Programmable output polarity
Power-up reset on all registers
Register Preload capability
Synchronous Preset/Asynchronous Reset
Security fuse to prevent duplication of proprietary designs
Also available in 3V operation–the P3C18V8Z
APPLICATIONS
Battery powered instruments
Laptop and pocket computers
Industrial control
Medical Instruments
Portable communications equipment
PIN CONFIGURATIONS
SP00544
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
D, DB, DH, N, Packages
I0/CLK
I1
I2
I3
I4
I5
I6
I7
I8
F0
GND
F1
F2
F3
F4
F5
F6
F7
VCC
I9/OE
D = Plasitc Small Outline Large Package (300mil-wide)
DB = Plastic Shrink Small Outline Package (5.3mm wide)
DH = Plastic Thin Shrink Small Outline Package (4.4mm wide)
N = Plastic Dual In-Line Package (DIP) (300mil-wide)
1
2
3
4
5
6
7
8
910
11
12
13
14
15
16
17
18
19
20
A Package
A = Plastic Leaded Chip Carrier
F0
F1
F2
F3
F4
F5
F6
F7
VCC
I9/
OE
I0/
CLK
I1
I2
I3
I4
I5
I6
I7
I8 GND
PIN DESCRIPTIONS
I
Dedicated Input
B
Bidirectional input/output
O
Dedicated output
D
Registered output (D-type flip-flop)
F
Output/Input Macrocell
CLK
Clock Input
OE
Output Enable
VCC
Supply Voltage
GND
Ground
PAL is a registered trademark of Advanced Micro Devices, Inc.
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