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參數(shù)資料
| 型號(hào)： | 935201960518 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP48 |
| 封裝： | PLASTIC, SOT-313-2, LQFP-48 |
| 文件頁數(shù)： | 21/22頁 |
| 文件大?。?/td> | 178K |
| 代理商： | 935201960518 |
1995 Nov 03
8
Philips Semiconductors
Preliminary specication
YUV-to-RGB Digital-to-Analog
Converter (DAC)
SAA7167
Voltage output ampliers
Before the analog input enters the analog mixers, it passes
through voltage output amplifiers. Level shifters are used
internally to provide an offset of 0.2 V and an amplifier gain
of 2 for analog inputs to match with the output levels from
DACs. After buffering with voltage output amplifiers, the
final RGB outputs can drive a 150
load directly (25
internal resistor, 50
external serial resistor, and 75
load resistor at monitor side (see Fig.9).
The output voltage level of DAC ranges from the lowest
level 0.2 V (zero code) to the highest level 1.82 V (all one
code).
With the digital input YUV video data in accordance with
CCIR-601, the RGB output of 8-bit DAC actually ranges
from the 16th step (black) to the 235th step (white).
Therefore, after the voltage divider with external serial
resistor and monitor load resistor, the output voltage range
to monitor is approximately 0.7 V (peak-to-peak).
I2C-bus control
Only one control byte is needed for the SAA7167.
The I2C-bus format is shown in Table 6.
Table 6
I2C-bus format
Notes
1. S = START condition.
2. Slave address = 1011 111X; this slave address is identical to the one for the SAA9065; X = R/W control bit:
a) X = 0; order to write.
b) X = 1; order to read (not used for SAA7167).
3. A = acknowledge; generated by the slave.
4. Subaddress = subaddress byte.
5. Data = data byte.
6. P = STOP condition.
Table 7
Control data byte
S
slave address
A
subaddress
A
data
A
P
SUBADDRESS
D7
D6
D5
D4
D3
D2
D1
D0
00
KMOD2
KMOD1
KMOD0
DRP
KEN
KINV
FMTC1
FMTC0
01
00000
KDLY2
KDLY1
KDLY0
02
KD7
KD6
KD5
KD4
KD3
KD2
KD1
KD0
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