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參數資料
| 型號： | 935201960518 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 消費家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP48 |
| 封裝： | PLASTIC, SOT-313-2, LQFP-48 |
| 文件頁數： | 2/22頁 |
| 文件大小： | 178K |
| 代理商： | 935201960518 |
1995 Nov 03
10
Philips Semiconductors
Preliminary specication
YUV-to-RGB Digital-to-Analog
Converter (DAC)
SAA7167
AC CHARACTERISTICS
Tamb = 0 to 70 °C.
Notes
1. Switching time measured from the 50% point of the EXTKEY transition edge to the 50% point of the selected analog
output transition.
2. DAC output rise/fall time measured between the 10% and 90% points of full scale transition.
3. DAC settling time measured from the 50% point of full-scale transition to the output remaining within
±1 LSB.
4. DAC analog output propagation delay measured from the 50% point of the rising edge of VCLK to the 50% point of
full-scale transition.
SYMBOL
PARAMETER
MIN.
TYP.
MAX.
UNIT
fclk
video clock rate
50
MHz
δ
duty factor of VCLK
50
%
PCLK
pixel clock rate (8-bit pixel colour key); see Fig.4
50
MHz
pixel clock rate (2
× 8-bit pixel colour key; mode 1);
see Fig.5
40
MHz
pixel clock rate (2
× 8-bit pixel colour key; mode 2);
see Fig.6
80
MHz
pixel clock rate (3
× 8-bit pixel colour key); see Fig.7
75
MHz
duty factor of PCLK
40
50
60
%
tsu1
digital input set-up time to VCLK rising edge
3
ns
th1
digital input hold time to VCLK rising edge
3
ns
tsu2
digital input set-up time to PCLK rising edge
3
ns
th2
digital input hold time to PCLK rising edge
3
ns
tsu3
digital input set-up time to PCLK falling edge
3
ns
th3
digital input hold time to PCLK falling edge
3
ns
tsw
switching time between video DAC/analog inputs;
note 1
15
ns
Tgroup
overall group delay from digital video inputs to analog
outputs (see Fig.8):
YUV video input mode
20TVCLK +tPD
ns
RGB video input mode
12TVCLK +tPD
ns
tr
DAC analog output rise time (see Fig.8); note 2
5
ns
tf
DAC analog output fall time (see Fig.8); note 2
5
ns
ts
DAC analog output settling time (see Fig.8); note 3
15
ns
tPD
DAC analog output propagation delay (see Fig.8);
note 4
15
ns
Analog outputs from analog inputs
Gv
voltage gain
2.0
B
bandwidth (
3 dB)
75
MHz
SR
slew rate
90
V/
s
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