參數(shù)資料
型號： 935198960112
廠商： NXP SEMICONDUCTORS
元件分類： 消費(fèi)家電
英文描述： SPECIALTY CONSUMER CIRCUIT, PQCC44
封裝： PLASTIC, SOT-187, LCC-44
文件頁數(shù)： 4/18頁
文件大?。?/td> 143K
代理商： 935198960112
1997 Jun 10
12
Philips Semiconductors
Preliminary specication
PANorama-IC (PAN-IC)
SAA4995WP
Notes
1. For a symmetrical bathtub curve Xnl +Xnr = output samples per line + 1.
2. WEI falling edge delay to the WEO latest sample should not be equal to the pipeline delay. This can be controlled
with the WEI length via the microcontroller.
TEST
The test mode can be chosen via pins TEST, T0 and T1.
Table 6
Test modes
Note
1. X = don’t care.
45
C0
8
7 : 0
constant DTOincr value for area I, MSB extended by zoom bit
at address 48 (twos complement value); see Figs 3 and 4
46
C1
6
5 : 0
2nd derivatives for DTOincr for areas II and V
(twos complement value); see Figs 3 and 4
distribution
1
6
enables odd/even sample distribution; see Tables 1 to 4
47
C2
6
5 : 0
2nd derivatives for DTOincr for areas III and IV
(twos complement value)
test 1
1
6
test bit, must be logic 0 in normal operation
notch
1
7
SECAM Y notch on/off (logic 1 = on, logic 0 = off)
48
zoom bit
1
0
logic 1 = zoom, logic 0 = compress in area I
in-phase
1
logic 1 = shifted relation WE_IN to input data; see Fig.5
out-phase
1
2
logic 1 = shifted relation WEO/WEod to output data; see Fig.5
init
1
3
circuitry is initialized at VRST pulse
vrst_xfer
1
4
new settings are activated at VRST pulse
keep
1
5
compression curve is kept from last active line in eld
test 2
1
6
test bit, must be logic 0 in normal operation
adapt
1
7
adapt bit, must be logic 0 in normal operation
49
identify read
8 read bits
7 : 0
PAN-IC identies by pulling all bits LOW (hardware cluck)
MODE
PIN NAME
TEST
T1
T0
Functional test
0
X(1)
Test mode on
1
X(1)
ADDRESS
(HEX)
FUNCTION
# OF BITS
BIT
POSITION
REMARKS
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