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參數(shù)資料
| 型號(hào)： | 933739570602 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 總線收發(fā)器 |
| 英文描述： | F/FAST SERIES, OCTAL 1-BIT DRIVER, TRUE OUTPUT, PDSO20 |
| 封裝： | 7.50 MM, PLASTIC, MS-013, SOT-163-1, SO-20 |
| 文件頁數(shù)： | 8/13頁 |
| 文件大?。?/td> | 146K |
| 代理商： | 933739570602 |
Philips Semiconductors
Product data
74F373/74F374
Latch/flip-flop
2002 Nov 20
4
LOGIC DIAGRAM FOR 74F373
VCC = Pin 20
GND = Pin 10
D0
D
E
Q
Q0
3
2
D1
D
E
Q
Q1
4
5
D2
D
E
Q
Q2
7
6
D3
D
E
Q
Q3
8
9
D4
D
E
Q
Q4
13
12
D5
D
E
Q
Q5
14
15
D6
D
E
Q
Q6
17
16
D7
D
E
Q
Q7
18
19
11
E
SF00256
1
OE
LOGIC DIAGRAM FOR 74F374
VCC = Pin 20
D0
D
CP Q
Q0
3
2
D1
D
CP Q
Q1
4
5
D2
D
CP Q
Q2
7
6
D3
D
CP Q
Q3
8
9
D4
D
CP Q
Q4
13
12
D5
D
CP Q
Q5
14
15
D6
D
CP Q
Q6
17
16
D7
D
CP Q
Q7
18
19
11
OE
CP
GND = Pin 10
SF00257
1
FUNCTION TABLE FOR 74F373
INPUTS
INTERNAL
OUTPUTS
OPERATING MODE
OE
E
Dn
REGISTER
Q0 - Q7
OPERATING MODE
L
H
L
Enable and read register
L
H
Enable and read register
L
↓
l
L
Latch and read register
L
↓
h
H
Latch and read register
L
X
NC
Hold
H
L
X
NC
Z
Disable outputs
H
Dn
Z
Disable outputs
NOTES:
H =
High-voltage level
h
=
HIGH state must be present one set-up time before the HIGH-to-LOW enable transition
L
=
Low-voltage level
l
=
LOW state must be present one set-up time before the HIGH-to-LOW enable transition
NC=
No change
X =
Don’t care
Z =
High impedance “off” state
↓ =
HIGH-to-LOW enable transition
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