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參數(shù)資料
| 型號(hào)： | 933739570602 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 總線收發(fā)器 |
| 英文描述： | F/FAST SERIES, OCTAL 1-BIT DRIVER, TRUE OUTPUT, PDSO20 |
| 封裝： | 7.50 MM, PLASTIC, MS-013, SOT-163-1, SO-20 |
| 文件頁(yè)數(shù)： | 11/13頁(yè) |
| 文件大?。?/td> | 146K |
| 代理商： | 933739570602 |
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Philips Semiconductors
Product data
74F373/74F374
Latch/flip-flop
2002 Nov 20
7
AC SET-UP REQUIREMENTS
LIMITS
Tamb = +25 °C
Tamb = 0 °C to +70 °C
SYMBOL
PARAMETER
TEST
VCC = +5.0 V
VCC = +5.0 V ± 10%
UNIT
CONDITION
CL = 50 pF, RL = 500
MIN
TYP
MAX
MIN
MAX
tsu (H)
tsu (L)
Set-up time, HIGH or LOW level
Dn to E
Waveform 4
0
1.0
0
1.0
ns
th (H)
th (L)
Hold time, HIGH or LOW level
Dn to E
74F373
Waveform 4
3.0
ns
tw (H)
E Pulse width, HIGH
Waveform 1
3.5
4.0
ns
tsu (H)
tsu (L)
Set-up time, HIGH or LOW level
Dn to CP
Waveform 5
2.0
ns
th (H)
th (L)
Hold time, HIGH or LOW level
Dn to CP
74F374
Waveform 5
0
ns
tw (H)
tw (L)
CP Pulse width,
HIGH or LOW
Waveform 5
3.5
4.0
3.5
4.0
ns
AC WAVEFORMS
For all waveforms, VM = 1.5 V.
The shaded areas indicate when the input is permitted to change for
predictable output performance.
CP VM
VM
tw(H)
1/fmax
VM
tPHL
tw(L)
tPLH
Qn
SF00258
Waveform 1. Propagation delay for clock input to output,
clock pulse widths, and maximum clock frequency
tPHL
EVM
VM
tw(H)
VM
Qn
tPLH
SF00259
Waveform 2. Propagation delay for enable to output
and enable pulse width
Dn
VM
tPHL
tPLH
Qn
SF00260
Waveform 3. Propagation delay for data to output
VM
tsu(L)
th(L)
tsu(H)
th(H)
E
Dn
SF00261
Waveform 4. Data set-up time and hold times
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