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參數(shù)資料
| 型號： | 933637620112 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 諧振器 |
| 英文描述： | 4000/14000/40000 SERIES, PRESCALER, PDIP18 |
| 封裝： | PLASTIC, SOT-102-3, DIP-18 |
| 文件頁數(shù)： | 7/11頁 |
| 文件大?。?/td> | 115K |
| 代理商： | 933637620112 |
January 1995
5
Philips Semiconductors
Product specication
Universal timer module
HEF4753B
LSI
2. Divider mode (LFC = LOW; Y = HIGH; Z = LOW)
In this mode the output OUT should be connected to input IN. If not, only one counter cycle starts after a transition at
input IN (see Fig.4 and note 1.).
3. Delayed LOW to HIGH edge mode; see note 2. (LFC = HIGH; Y = HIGH; Z = LOW)
Fig.4 Timing diagram for divider mode; t1 = delay until set of 8-bit counter; t2, t3 see Fig.3.
A
B
C
D
E
F
G
H
W
X
LFC
Y
Z
LL
H
L
H
L
Fig.5
Timing diagram for delayed LOW to HIGH edge mode; t1 = delay until set of 8-bit counter; t2 = delay to
set 8-bit counter; t3 = predefined delay by programming; t4 = delay until next negative clock edge;
t5 = delay until next positive clock edge.
ABC
D
E
F
G
H
W
X
LFC
Y
Z
HL
H
L
H
L
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