參數(shù)資料
型號(hào)： 932S825YGT
廠(chǎng)商： INTEGRATED DEVICE TECHNOLOGY INC
元件分類(lèi)： 時(shí)鐘產(chǎn)生/分配
英文描述： 220 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO64
封裝： 6.10 MM, 0.50 MM PITCH, MO-153, TSSOP-64
文件頁(yè)數(shù)： 20/20頁(yè)
文件大?。?/td> 225K
代理商： 932S825YGT
9
ICS932S825
1276F—12/02/08
AC Electrical Characteristics - Low Power Differential CPU Outputs
TA = 0 - 70°C; VDD = 3.3 V +/-5%; CL =AMD64 Processor Test Load
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
NOTES
Crossing Point Variation
V
CROSS
Single-ended Measurement
140
mV
1
Frequency
f
198.8
200
MHz
2
Long Term Accuracy
ppm
-300
300
ppm3
Rising Edge Slew Rate
tSLR
Differential Measurement
0.5
10
V/ns
4,5
Falling Edge Slew Rate
tFLR
Differential Measurement
0.5
10
V/ns
4,5
CPU Jitter - Cycle to
Cycle
CPUJC2C
Differential Measurement
150
ps
6
CPU Jitter - Accumulated
CPUJACC
Over a 10 uS period
-1
1
ns
7
Maximum Output Voltage
VHIGH
Includes overshoot, single-ended
measurement
1150
mV
1
Minimum Output Voltage
VLOW
Includes undershoot, single-ended
measurement
-300
mV
1
Differential Voltage Swing
Peak-to-Peak
VDPK-PK
Differential Measurement
400
2400
mV
8
Differential Voltage
VD
Differential Measurement
200
1200
mV
9
Change in VD DC cycle-to-
cycle
V
D
Single-ended Measurement
-75
75
mV
10
Duty Cycle
DCYC
Differential Measurement
45
55
%
11
CPU[6:0] Skew
CPUSKEW10
Differential Measurement
250
ps
Notes on Electrical Characteristics (Guaranteed by design and characterization, not 100% tested in production):
2 Minimum frequency results from 0.5% down spread.
3 Measured with spread spectrum off.
4 This parameter is intended to give guidance for simulation.
6 Between any two adjacent cycles.
10 The difference in magnitude of two adjacent V
DDC measurements. VDDC is the stable post overshoot and ring-back part
11 Defined as tHIGH/tCYCLE
8 V
DPK-PK is the overall magnitude of the differential signal.
9 V
DMIN is the amplitude of the ring-back differential measurement, guaranteed by design, that ring-back will not cross 0V
VD. VDMAX is the largest amplitude allowed.
1Single-ended measurement at crossing point. Value is max-min over all time. DC value of common mode is not important due to
the blocking cap.
5 Differential measurement through the range of +/-100mV
7 Accumulated over a 10 uS time periode, measured with JIT2 TIE at 50ps interval.
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932SQ420BGLF 制造商:Integrated Device Technology Inc 功能描述:SERVER MAIN CLOCK - CK420BQ
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