參數(shù)資料
型號: 932S431AGLF
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: 時鐘產生/分配
英文描述: 400 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56
封裝: 6.10 MM, 0.50 MM PITCH, ROHS COMPLIANT, MO-153, TSSOP-56
文件頁數(shù): 5/22頁
文件大小: 226K
代理商: 932S431AGLF
13
Integrated
Circuit
Systems, Inc.
ICS932S431A
Datasheet
1426A—11/12/09
SMBus Table: Stop and Power Down Mode Drive Control Register
Pin #
Name
Control Function
Type
0
1
PWD
Bit 7
CPUCLK3 PD Drive
Drive Mode in PD
RW
Driven
Hi-Z
0
Bit 6
CPUCLK2 PD Drive
Drive Mode in PD
RW
Driven
Hi-Z
0
Bit 5
CPUCLK1 PD Drive
Drive mode in PD
RW
Driven
Hi-Z
0
Bit 4
CPUCLK0 PD Drive
Drive mode in PD
RW
Driven
Hi-Z
0
Bit 3
CPUCLK3 Stop En
RW
Free-Running
Stoppable
1
Bit 2
CPUCLK2 Stop En
RW
Free-Running
Stoppable
1
Bit 1
CPUCLK1 Stop En
RW
Free-Running
Stoppable
1
Bit 0
CPUCLK0 Stop En
RW
Free-Running
Stoppable
1
SMBus Table: Stop and Power Down Mode Drive Control Register
Byte 5
Pin #
Name
Control Function
Type
0
1
PWD
Bit 7
0
Bit 6
SRC Stop Drive Mode
Driven in STOP
RW
Driven
Hi-Z
0
Bit 5
SRC PD Drive Mode
Driven in PD
RW
Driven
Hi-Z
0
Bit 4
0
Bit 3
CPUCLK3 Stop Drive
Drive Mode in Stop
RW
Driven
Hi-Z
0
Bit 2
CPUCLK2 Stop Drive
Drive Mode in Stop
RW
Driven
Hi-Z
0
Bit 1
CPUCLK1 Stop Drive
Drive Mode in Stop
RW
Driven
Hi-Z
0
Bit 0
CPUCLK0 Stop Drive
Drive Mode in Stop
RW
Driven
Hi-Z
0
SMBus Table: Test Mode and FS Readback Register
Pin #
Name
Control Function
Type
0
1
PWD
Bit 7
Test Mode Selection
RW
Hi-Z
REF/N
0
Bit 6
Test Clock Mode Entry
Test Mode
RW
Disable
Enable
0
Bit 5
0
Bit 4
REF Drive Strength
1X or 2X
RW
1X
2X
1
Bit 3
PCI_STOP Control
Stop non-free running PC
and SRC clocks.
RW
Stop
Run
1
Bit 2
FS_C
FS_C readback
R
Latch
Bit 1
FS_B
FS_B readback
R
Latch
Bit 0
FS_A
FS_A readback
R
Latch
SMBus Table: Vendor & Revision ID Register
Pin #
Name
Control Function
Type
0
1
PWD
Bit 7
RID3
R
-
0
Bit 6
RID2
R
-
0
Bit 5
RID1
R
-
0
Bit 4
RID0
R
-
0
Bit 3
VID3
R
-
0
Bit 2
VID2
R
-
0
Bit 1
VID1
R
-
0
Bit 0
VID0
R
-
1
RESERVED
See 932s431 Functionality
Table
VENDOR ID
Byte 7
-
Byte 4
SRC
36,37
39,40
42,43
-
Free-Running Control,
Default: not affected by
CPU_STOP
RESERVED
-
PCI, SRC
54,55
-
Byte 6
-
39,40
36,37
39,40
45,46
42,43
45,46
-
45,46
36,37
-
REVISION ID
(0 for A rev)
-
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