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參數(shù)資料
| 型號： | 932S421BFLFT |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時(shí)鐘產(chǎn)生/分配 |
| 英文描述： | 333.33 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 |
| 封裝： | ROHS COMPLIANT, MO-118, SSOP-56 |
| 文件頁數(shù)： | 9/23頁 |
| 文件大?。?/td> | 220K |
| 代理商： | 932S421BFLFT |
IDTTM
PCIe Gen2 and QPI Clock for Intel-Based Servers
1340G—01/26/10
ICS932S421B
PCIe Gen2 and QPI Clock for Intel-Based Servers
17
SMBus Table: SRC/PCI Frequency Control Register
Pin #
Name
Control Function
Type
0
1
PWD
Bit 7
SRC N Div8
N Divider Prog bit 8
RW
X
Bit 6
SRC N Div9
N Divider Prog bit 9
RW
X
Bit 5
SRC M Div5
RW
X
Bit 4
SRC M Div4
RW
X
Bit 3
SRC M Div3
RW
X
Bit 2
SRC M Div2
RW
X
Bit 1
SRC M Div1
RW
X
Bit 0
SRC M Div0
RW
X
SMBus Table: SRC/PCI Frequency Control Register
Pin #
Name
Control Function
Type
0
1
PWD
Bit 7
SRC N Div7
RW
X
Bit 6
SRC N Div6
RW
X
Bit 5
SRC N Div5
RW
X
Bit 4
SRC N Div4
RW
X
Bit 3
SRC N Div3
RW
X
Bit 2
SRC N Div2
RW
X
Bit 1
SRC N Div1
RW
X
Bit 0
SRC N Div0
RW
X
SMBus Table: SRC/PCI Spread Spectrum Control Register
Pin #
Name
Control Function
Type
0
1
PWD
Bit 7
SRC SSP7
RW
X
Bit 6
SRC SSP6
RW
X
Bit 5
SRC SSP5
RW
X
Bit 4
SRC SSP4
RW
X
Bit 3
SRC SSP3
RW
X
Bit 2
SRC SSP2
RW
X
Bit 1
SRC SSP1
RW
X
Bit 0
SRC SSP0
RW
X
SMBus Table: SRC/PCI Spread Spectrum Control Register
Pin #
Name
Control Function
Type
0
1
PWD
Bit 7
Reserved
R
-
0
Bit 6
SRC SSP14
RW
X
Bit 5
SRC SSP13
RW
X
Bit 4
SRC SSP12
RW
X
Bit 3
SRC SSP11
RW
X
Bit 2
SRC SSP10
RW
X
Bit 1
SRC SSP9
RW
X
Bit 0
SRC SSP8
RW
X
-
Byte 15
-
Byte 16
-
Byte 17
-
Spread Spectrum
Programming b(14:8)
These Spread Spectrum bits in
Byte 17 and 18 will program the
spread pecentage of SRC
-
These Spread Spectrum bits in
Byte 17 and 18 will program the
spread pecentage of SRC
Spread Spectrum
Programming b(7:0)
The decimal representation of
M and N Divider in Byte 15 and
16 will configure the SRC VCO
frequency. Default at power up
= latch-in or Byte 0 Rom table.
VCO Frequency = 14.318 x
[NDiv(9:0)+8] / [MDiv(5:0)+2]
M Divider Programming
bits
N Divider Programming
b(7:0)
The decimal representation of
M and N Divider in Byte 15 and
16 will configure the SRC VCO
frequency. Default at power up
= latch-in or Byte 0 Rom table.
VCO Frequency = 14.318 x
[NDiv(9:0)+8] / [MDiv(5:0)+2]
Byte 18
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PDF描述 |
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| 932S421CGLF | 400 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 932S421BGLF | 功能描述:時(shí)鐘合成器/抖動清除器 CK410B+ SERVER MAIN CLOCK RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| 932S421BGLFT | 功能描述:時(shí)鐘合成器/抖動清除器 CK410B+ SERVER MAIN CLOCK RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| 932S421CFLF | 功能描述:時(shí)鐘合成器/抖動清除器 RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| 932S421CFLFT | 功能描述:時(shí)鐘合成器/抖動清除器 RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| 932S421CGLF | 功能描述:時(shí)鐘合成器/抖動清除器 RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
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