參數(shù)資料
型號: 932S208DFT
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: 時鐘產(chǎn)生/分配
英文描述: 400 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56
封裝: GREEN, MO-118, SSOP-56
文件頁數(shù): 6/22頁
文件大?。?/td> 231K
代理商: 932S208DFT
14
Integrated
Circuit
Systems, Inc.
ICS932S208
0743D—07/07/04
I
2C Table: Output Control and Fix Frequency Register
Pin #
Name
Control Function
Type0
1
PWD
Bit 7
Test Clock Mode
RW
Disable
Enable
0
Bit 6
RESERVED
-
0
Bit 5
FS Testmode
FS_A and FS_B
Operation
RW
Normal
Test Mode
0
Bit 4
SRC100#
SRC Frequency
Select
RW
100MHz
200MHz
0
Bit 3
RESERVED
-
0
Bit 2
SSEN
Spread Spectrum
Enable
RW
Spread
OFF
Spread
ON
0
Bit 1
REF1
Output Control
RW
Disable
Enable
1
Bit 0
REF0
Output Control
RW
Disable
Enable
1
I
2C Table: Vendor & Revision ID Register
Pin #
Name
Control Function
Type0
1
PWD
Bit 7
RID3
R
-
X
Bit 6
RID2
R
-
X
Bit 5
RID1
R
-
X
Bit 4
RID0
R
-
X
Bit 3
VID3
R
-
0
Bit 2
VID2
R
-
0
Bit 1
VID1
R
-
0
Bit 0
VID0
R
-
1
-
VENDOR ID
-
Byte 7
-
REVISION ID
-
1
37,38
7,8,9,12,13,14,15,1
8,19,20,22,23,26,27
,29,31,32,37,38,40,
41,43,44,46,47
2
-
40,41,43,44,46,47
1,2,7,8,9,12,13,14,
15,18,19,20,22,23,2
6,27,29,31,32,37,38
,40,41,43,44,46,47
Byte 6
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PDF描述
932S208DFLFT 400 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56
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