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參數(shù)資料
| 型號： | 932S203YGLF |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘產(chǎn)生/分配 |
| 英文描述： | 133.3 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 |
| 封裝： | 6.10 MM, 0.50 MM PITCH, GREEN, MO-153, TSSOP-56 |
| 文件頁數(shù)： | 5/18頁 |
| 文件大?。?/td> | 243K |
| 代理商： | 932S203YGLF |
IDTTM Frequency Generator with 133MHz Differential CPU Clocks
0601G—01/26/10
ICS932S203
Frequency Generator with 133MHz Differential CPU Clocks
13
All 3V66 clocks are to be in phase with each other. All 66MHz_OUT clocks are to be in phase with each other. There is NO
phase relationship between the 3V66 clocks and the 66MHz_OUT and PCI clocks. In the case where 3V66_1 is configured
as 48MHz VCH clock, there is no defined phase relationship between 3V66_1/VCH and other 3V66 clocks. The PCI group
should lag 3V66 by the standard skew described below as Tpci.
The 66MHz_IN to 66MHz_OUT delay is shown in the figure below and is specified to be within a min and max propagation
value.
66MHz_IN
66MHz_OUT
PCICLK_F
3V66
Tpd
Tpci
No Relationship
Buffered Mode - 3V66[0:1], 66MHz_IN, 66MHz_OUT[0:2] and PCI Phase Relationship
Group Skews at Common Transition Edges: (Buffered Mode)
GROUP
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
3V66
3V66 (1:0) pin to pin skew
0
500
ps
66MHz_OUT
66OUT
66MHz_OUT (2:0) pin to pin skew
0
175
ps
PCI
PCI_F (2:0) and PCI (6:0) pin to pin skew
0
500
ps
66MHz_IN 66MHz_OUT
Tpd
Propogation delay from 66MHz_IN to
66MHz_OUT (2:0)
2.5
4.5
ns
66MHz_OUT to PCI
Tpci
66MHz_OUT (2:0) leads 33 MHz PCI
1.5
3.5
ns
1Guaranteed by design, not 100% tested in production.
相關PDF資料 |
PDF描述 |
|---|---|
| 932S203YFT | 133.3 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 |
| 932S203YFLN | 133.3 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 |
| 932S208DG | 400 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 |
| 932S208DGLFT | 400 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 |
| 932S208DGT | 400 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| 932S203YGLXT | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:Frequency Generator with 133MHz Differential CPU Clocks |
| 932S208DFLF | 功能描述:時鐘合成器/抖動清除器 SERVER MAIN CLOCK RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| 932S208DFLFT | 功能描述:時鐘合成器/抖動清除器 SERVER MAIN CLOCK RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| 932S208DGLF | 功能描述:時鐘合成器/抖動清除器 SERVER MAIN CLOCK RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| 932S208DGLFT | 功能描述:時鐘合成器/抖動清除器 SERVER MAIN CLOCK RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
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