- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄24634 > 932S203AGLF (INTEGRATED DEVICE TECHNOLOGY INC) 133.3 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 PDF資料下載
參數(shù)資料
| 型號： | 932S203AGLF |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘產(chǎn)生/分配 |
| 英文描述： | 133.3 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 |
| 封裝： | 6.10 MM, 0.50 MM PITCH, GREEN, MO-153, TSSOP-56 |
| 文件頁數(shù)： | 7/19頁 |
| 文件大?。?/td> | 284K |
| 代理商： | 932S203AGLF |
15
ICS932S203
0601E—12/22/04
When PD# is sampled low by two consecutive rising edges of CPU clock then all clock outputs except CPU clocks
must be held low on their next high to low transition. CPU clocks must be held with the CPU clock pin driven high with
a value of 2x Iref, and CPUC undriven. Note the example below shows CPU = 100MHz, this diagram and description
is applicable for all valid CPU frequencies 66, 100, 133, 200MHz.
Due to the state of the internal logic, stopping and holding the REF clock outputs in the LOW state may require more
than one clock cycle to complete.
PD# - Assertion (transition from logic "1" to logic "0")
PD# Functionality
#
P
O
T
S
_
U
P
CT
U
P
CC
U
P
C6
6
V
3T
U
O
_
z
H
M
6
F
_
K
L
C
I
C
P
K
L
C
I
C
P
K
L
C
I
C
P
T
O
D
/
B
S
U
z
H
M
8
4
1l
a
m
r
o
Nl
a
m
r
o
Nz
H
M
6
6N
I
_
z
H
M
6
6N
I
_
z
H
M
6
6N
I
_
z
H
M
6
6z
H
M
8
4
0t
l
u
M
*
f
e
r
it
a
o
l
Fw
o
Lw
o
Lw
o
Lw
o
Lw
o
L
Power Down Assertion of Waveforms - Buffered Mode
0ns
PD#
CPUT 100MHz
CPUC 100MHz
3V66MHz
66MHz_IN
66MHz_OUT
PCI 33MHz
USB 48MHz
REF 14.318MHz
25ns
50ns
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 932S203AFLN | 133.3 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 |
| 932S203AGLFT | 133.3 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 |
| 932S203AFLNT | 133.3 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 |
| 932S203YFLFT | 133.3 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 |
| 932S203YGLF | 133.3 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 932S203AGLFT | 功能描述:時鐘發(fā)生器及支持產(chǎn)品 SERVER MAIN CLOCK RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56 |
| 932S203YFLXT | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:Frequency Generator with 133MHz Differential CPU Clocks |
| 932S203YGLXT | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:Frequency Generator with 133MHz Differential CPU Clocks |
| 932S208DFLF | 功能描述:時鐘合成器/抖動清除器 SERVER MAIN CLOCK RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| 932S208DFLFT | 功能描述:時鐘合成器/抖動清除器 SERVER MAIN CLOCK RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。