- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄360558 > 90S1200 (Atmel Corp.) -bit AVR Microcontroller with 8K Bytes In- System Programmable Flash PDF資料下載
參數(shù)資料
| 型號： | 90S1200 |
| 廠商： | Atmel Corp. |
| 元件分類： | 8位微控制器 |
| 英文描述： | -bit AVR Microcontroller with 8K Bytes In- System Programmable Flash |
| 中文描述： | 位AVR微控制器具有8K字節(jié)的系統(tǒng)內(nèi)可編程閃存 |
| 文件頁數(shù)： | 18/71頁 |
| 文件大?。?/td> | 1416K |
| 代理商： | 90S1200 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁當(dāng)前第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁
18
AT90S1200
0838H
–
AVR
–
03/02
MCU Control Register
–
MCUCR
The MCU Control Register contains general microcontroller control bits for general MCU
control functions.
Bits 7, 6
–
Res: Reserved Bits
These bits are reserved bits in the AT90S1200 and always read as zero.
Bit 5
–
SE: Sleep Enable
The SE bit must be set (one) to make the MCU enter the Sleep mode when the SLEEP
instruction is executed. To avoid the MCU entering the Sleep mode unless it is the pro-
grammers purpose, it is recommended to set the Sleep Enable SE bit just before the
execution of the SLEEP instruction.
Bit 4
–
SM: Sleep Mode
This bit selects between the two available sleep modes. When SM is cleared (zero), Idle
mode is selected as sleep mode. When SM is set (one), Power-down mode is selected
as sleep mode. For details, refer to the paragraph
“
Sleep Modes
”
on the following page.
Bits 3, 2
–
Res: Reserved Bits
These bits are reserved bits in the AT90S1200 and always read as zero.
Bits 1, 0
–
ISC01, ISC00: Interrupt Sense Control 0 Bit 1 and Bit 0
The External Interrupt 0 is activated by the external pin INT0 if the SREG I-flag and the
corresponding interrupt mask in the GIMSK register is set. The level and edges on the
external INT0 pin that activate the interrupt are defined in Table 4.
Table 4.
Interrupt 0 Sense Control
The value on the INT0 pin is sampled before detecting edges. If edge interrupt is
selected, pulses with a duration longer than one CPU clock period will generate an inter-
rupt. Shorter pulses are not guaranteed to generate an interrupt. If low level interrupt is
selected, the low level must be held until the completion of the currently executing
instruction to generate an interrupt. If enabled, a level triggered interrupt will generate an
interrupt request as long as the pin is held low.
Bit
7
6
5
4
3
2
1
0
$35
–
–
SE
SM
–
–
ISC01
ISC00
MCUCR
Read/Write
R
R
R/W
R/W
R
R
R/W
R/W
Initial Value
0
0
0
0
0
0
0
0
ISC01
ISC00
Description
0
0
The low level of INT0 generates an interrupt request.
0
1
Reserved
1
0
The falling edge of INT0 generates an interrupt request.
1
1
The rising edge of INT0 generates an interrupt request.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 90S2313 | -bit AVR Microcontroller with 8K Bytes In- System Programmable Flash |
| 90S2343 | -bit AVR Microcontroller with 8K Bytes In- System Programmable Flash |
| 90S4414 | 16 Characters x 2 Lines, 5x7 Dot Matrix Character and Cursor |
| 90S8535 | -bit AVR Microcontroller with 8K Bytes In- System Programmable Flash |
| 90SCFM | 20SCFM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 90S2313 | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:8-Bit Microcontroller with 2K bytes In-System Programmable Flash |
| 90S2343 | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:8-Bit Microcontroller with 2K Bytes of In-System Programmable Flash |
| 90S4414 | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:8-Bit Microcontroller with 4K bytes In-System Programmable Flash |
| 90S7A | 制造商:QUARTZCOM 制造商全稱:QUARTZCOM the communications company 功能描述:-20 ~ +70 °C commercia l application -30 ~ +75 °C on request |
| 90S8535 | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:8-Bit Microcontroller with 4K/8K Bytes In-System Programmable Flash |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。