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參數(shù)資料
| 型號(hào)： | TE28F004SC-100 |
| 廠商： | INTEL CORP |
| 元件分類： | DRAM |
| 英文描述： | BYTE-WIDE SmartVoltage FlashFile MEMORY FAMILY 4, 8, AND 16 MBIT |
| 中文描述： | 512K X 8 FLASH 3.3V PROM, 100 ns, PDSO40 |
| 封裝： | 10 X 20 MM, TSOP-40 |
| 文件頁數(shù)： | 34/58頁 |
| 文件大?。?/td> | 920K |
| 代理商： | TE28F004SC-100 |
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28F004/400B3, 28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3
28
3UHOLPLQDU\
AC Characteristics—Write Operations, continued
NOTES:
1. Refer to command definition table (
Table 6
) for valid A
or D
.
2. Write pulse width (t
) is defined from CE# or WE# going low (whichever goes low last)
to CE# or WE# going
high (whichever goes high first). Hence, t
= t
= t
= t
= t
. Similarly, Write pulse width
high (t
) is defined from CE# or WE# going high (whichever goes high first)
to CE# or WE# going low
(whichever goes low first). Hence, t
WPH
= t
WHWL
= t
EHEL
= t
WHEL
= t
EHWL
.
3. Sampled, but not 100% tested.
Read timing characteristics during program suspend and erase suspend are the same as during read-only
operations.
See
Figure 5
for timing measurements and maximum allowable input slew rate.
See
Figure 8, “AC Waveform: Program and Erase Operations” on page 32
.
#
Sym
Parameter
Density
16 Mbit
Unit
Product
70 ns
80 ns
90 ns
110 ns
V
CC
2.7 V –
3.6 V
2.7 V –
3.6 V
3.0 V –
3.6 V
2.7 V –
3.6 V
3.0 V –
3.6 V
2.7 V –
3.6 V
Note
Min
Min
Min
Min
Min
Min
W1
t
PHWL
/
t
PHEL
RP# High Recovery to WE# (CE#)
Going Low
150
150
600
600
600
600
ns
W2
t
ELWL
/
t
WLEL
CE# (WE#) Setup to WE# (CE#) Going
Low
0
0
0
0
0
0
ns
W3
t
ELEH
/
t
WLWH
WE# (CE#) Pulse Width
1
45
50
70
70
70
70
ns
W4
t
DVWH
/
t
DVEH
Data Setup to WE# (CE#) Going High
2
40
40
50
50
60
60
ns
W5
t
AVWH
/
t
AVEH
Address Setup to WE# (CE#) Going
High
2
50
50
70
70
70
70
ns
W6
t
WHEH
/
t
EHWH
CE# (WE#) Hold Time from WE#
(CE#) High
0
0
0
0
0
0
ns
W7
t
WHDX
/
t
EHDX
Data Hold Time from WE# (CE#) High
2
0
0
0
0
0
0
ns
W8
t
WHAX
/
t
EHAX
Address Hold Time from WE# (CE#)
High
2
0
0
0
0
0
0
ns
W9
t
WHWL /
t
EHEL
WE# (CE#) Pulse Width High
1
25
30
30
30
30
30
ns
W10
t
VPWH
/
t
VPEH
V
PP
Setup to WE# (CE#) Going High
3
200
200
200
200
200
200
ns
W11
t
QVVL
V
PP
Hold from Valid SRD
3
0
0
0
0
0
0
ns
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