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參數(shù)資料
| 型號： | 80-0206-R |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Speech Recognition Processor |
| 中文描述： | 語音識別處理器 |
| 文件頁數(shù)： | 17/49頁 |
| 文件大小： | 527K |
| 代理商： | 80-0206-R |
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Data Sheet
RSC-4128
17
P/N 80-0206-R
2006 Sensory Inc.
Memory Map Diagram
Data
Data Space
000000H
0FFFFFH
Read: MOVX (-RDF),
if D2.4 = 1
Write: MOVX (-WRD),
always
Codebank 0 and/or
Constants (Const)
Codebank 1 and/or
Constants (Const)
Constants (Const)
Code/Constant (Const) Space
-XM = 0
000000H
00FFFFH
010000H
01FFFFH
0FFFFFH
Read: MOVX (-RDR),
if D2.4 = 0
Write: None
Read: MOVC (-RDR)
Write: MOVC (-WRC)
Codebank 0 and/or
Constants (Const)
Codebank 1 and/or
Constants (Const)
N/A
Code/Constant (Const) Space
-XM = 1
000000H
00FFFFH
010000H
01FFFFH
0FFFFFH
Read: MOVX (-RDR),
if D2.4 = 0
Write: None
Read: MOVC (-RDR)
Write: MOVC (-WRC)
External Memory Interface during Reset
While the Reset pin is active A[19:0] are driven low and -RDR, -WRC, -RDF and –WRD are driven high. D[7:0] are
configured as inputs pulled up by 100Kohm internal resistors.
External Memory Interface during Powerdown
The external memory interface (A[19:0], D[7:0], -RDR, -WRC, -RDF and –WRD) automatically goes into a high-Z
state and is pulled up by a 100 Kohm internal resistor when the “pdn” bit is set, to conserve current.
One output, PDN, is active high when RSC-4128 is powered-down. This pin can be connected to the (active low)
chip enable pins of external memory devices to reduce power consumption during RSC-4128 power-down.
Wait States
General control of wait states is managed by register FC.Bits[7:5] (“bank” register). These bits are set to a value of
7 on reset, defaulting to slower memory. An initialization routine may be used to configure for faster memory.
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