參數(shù)資料
型號(hào): 7C146-55
廠商: Cypress Semiconductor Corp.
英文描述: 2Kx8 Dual-Port Static RAM
中文描述: 2Kx8雙端口靜態(tài)存儲(chǔ)器
文件頁(yè)數(shù): 3/18頁(yè)
文件大?。?/td> 339K
代理商: 7C146-55
CY7C132/CY7C136
CY7C142/CY7C146
3
Capacitance
[10]
Electrical Characteristics
Over the Operating Range
[6]
Parameter Description
V
OH
Output HIGH Voltage V
CC
= Min., I
OH
= -4.0 mA
V
OL
Output LOW Voltage I
OL
= 4.0 mA
Test Conditions
7C136-15
[3,4]
7C146-15
7C132-30
[3]
7C136-25,30
7C142-30
7C146-25,30
7C132-35
7C136-35
7C142-35
7C146-35
7C132-45,55
7C136-45,55
7C142-45,55
7C146-45,55
Unit
V
Min.
2.4
Max.
Min.
2.4
Max.
Min.
2.4
Max.
Min.
2.4
Max.
0.4
0.4
0.4
0.4
V
I
OL
= 16.0 mA
[7]
0.5
0.5
0.5
0.5
V
IH
V
IL
I
IX
I
OZ
Input HIGH Voltage
2.2
2.2
2.2
2.2
V
Input LOW Voltage
0.8
0.8
0.8
0.8
V
μ
A
μ
A
Input Load Current
GND < V
I
< V
CC
GND < V
O
< V
CC
,
Output Disabled
-5
+5
5
5
+5
5
5
+5
5
5
+5
Output Leakage
Current
-5
+5
+5
+5
+5
I
OS
Output Short
Circuit Current
[8]
V
CC
= Max.,
V
OUT
= GND
CE = V
IL
,
Outputs Open,
f = f
MAX[9]
CE
L
and CE
R
> V
IH
,
f = f
MAX[9]
-350
350
350
350
mA
I
CC
V
CC
Operating
Supply Current
Com’l
190
170
120
90
mA
Mil
170
120
I
SB1
Standby Current
Both Ports,
TTL Inputs
Com’l
75
65
45
35
mA
Mil
65
45
I
SB2
Standby Current
One Port,
TTL Inputs
CE
L
or CE
R
> V
IH
,
Active Port Outputs
Open,
f = f
MAX[9]
Both Ports CE
L
and
CE
R
> V
CC
– 0.2V,
V
IN
> V
CC
– 0.2V or
V
IN
< 0.2V, f = 0
One Port CE
L
or
CE
R
> V
CC
– 0.2V,
V
IN
> V
CC
– 0.2V or
V
IN
< 0.2V,
Active Port Outputs
Open,
f = f
MAX[9]
Com’l
135
115
90
75
mA
Mil
115
90
I
SB3
Standby Current
Both Ports,
CMOS Inputs
Com’l
15
15
15
15
mA
Mil
15
15
I
SB4
Standby Current
One Port,
CMOS Inputs
Com’l
125
105
85
70
mA
Mil
105
85
Parameter
Description
Test Conditions
Max.
15
10
Unit
pF
pF
C
IN
C
OUT
Notes:
6.
7.
8.
9.
10. This parameter is guaranteed but not tested.
Input Capacitance
Output Capacitance
T
A
= 25
°
C, f = 1 MHz,
V
CC
= 5.0V
See the last page of this specification for Group A subgroup testing information.
BUSY and INT pins only.
Duration of the short circuit should not exceed 30 seconds.
At f=f
, address and data inputs are cycling at the maximum frequency of read cycle of 1/t
rc
and using AC Test Waveforms input levels of GND to 3V.
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