參數(shù)資料
型號(hào)： 79RC32K438266BBI
廠商： Integrated Device Technology, Inc.
英文描述： IDTTM InterpriseTM Integrated Communications Processor
中文描述： IDTTM InterpriseTM集成通信處理器
文件頁(yè)數(shù)： 11/59頁(yè)
文件大?。?/td> 644K
代理商： 79RC32K438266BBI
11 of 59
May 25, 2004
IDT 79RC32438
MII1CRS
I
Ethernet 1 MII Carrier Sense.
This signal is asserted by the ethernet PHY
when either the transmit or receive medium is not idle.
MII1RXCLK
I
Ethernet 1 MII Receive Clock.
This clock is a continuous clock that provides a
timing reference for the reception of data.
MII1RXD[3:0]
I
Ethernet 1 MII Receive Data.
This nibble wide data bus contains the data
received by the ethernet PHY.
MII1RXDV
I
Ethernet 1 MII Receive Data Valid.
The assertion of this signal indicates that
valid receive data is in the MII receive data bus.
MII1RXER
I
Ethernet 1 MII Receive Error.
The assertion of this signal indicates that an
error was detected somewhere in the ethernet frame currently being sent in the
MII receive data bus.
MII1TXCLK
I
Ethernet 1 MII Transmit Clock.
This clock is a continuous clock that provides a
timing reference for the transfer of transmit data.
MII1TXD[3:0]
O
Ethernet 1 MII Transmit Data.
This nibble wide data bus contains the data to
be transmitted.
MII1TXENP
O
Ethernet 1 MII Transmit Enable.
The assertion of this signal indicates that data
is present on the MII for transmission.
MII1TXER
O
Ethernet 1 MII Transmit Coding Error.
When this signal is asserted together
with MIITXENP, the ethernet PHY will transmit symbols which are not valid data
or delimiters.
MIIMDC
O
MII Management Data Clock.
This signal is used as a timing reference for
transmission of data on the management interface.
MIIMDIO
I/O
MII Management Data.
This bidirectional signal is used to transfer data
between the station management entity and the ethernet PHY.
JTAG / EJTAG
EJTAG_TMS
I
EJTAG Mode
. The value on this signal controls the test mode select of the
EJTAG Controller. When using the JTAG boundary scan, this pin should be left
disconnected (since there is an internal pull-up) or driven high.
JTAG_TCK
I
JTAG Clock
. This is an input test clock used to clock the shifting of data into or
out of the boundary scan logic, JTAG Controller, or the EJTAG Controller.
JTAG_TCK is independent of the system and the processor clock with a nomi-
nal 50% duty cycle.
JTAG_TDI
I
JTAG Data Input
. This is the serial data input to the boundary scan logic, JTAG
Controller, or the EJTAG Controller.
JTAG_TDO
O
JTAG Data Output
. This is the serial data shifted out from the boundary scan
logic, JTAG Controller, or the EJTAG Controller. When no data is being shifted
out, this signal is tri-stated.
JTAG_TMS
I
JTAG Mode
. The value on this signal controls the test mode select of the
boundary scan logic or JTAG Controller. When using the EJTAG debug inter-
face, this pin should be left disconnected (since there is an internal pull-up) or
driven high.
Signal
Type
Name/Description
Table 1 Pin Description (Part 8 of 9)
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
79RC32K438-266BBI 功能描述:處理器 - 專門應(yīng)用 RoHS:否 制造商:Freescale Semiconductor 類型:Multimedia Applications 核心:ARM Cortex A9 處理器系列:i.MX6 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:1 GHz 指令/數(shù)據(jù)緩存: 數(shù)據(jù) RAM 大小:128 KB 數(shù)據(jù) ROM 大小: 工作電源電壓: 最大工作溫度:+ 95 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MAPBGA-432
79RC32K438300BB 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:IDTTM InterpriseTM Integrated Communications Processor
79RC32K438-300BB 功能描述:處理器 - 專門應(yīng)用 RoHS:否 制造商:Freescale Semiconductor 類型:Multimedia Applications 核心:ARM Cortex A9 處理器系列:i.MX6 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:1 GHz 指令/數(shù)據(jù)緩存: 數(shù)據(jù) RAM 大小:128 KB 數(shù)據(jù) ROM 大小: 工作電源電壓: 最大工作溫度:+ 95 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MAPBGA-432
79RC32K438-300BBG 功能描述:處理器 - 專門應(yīng)用 RoHS:否 制造商:Freescale Semiconductor 類型:Multimedia Applications 核心:ARM Cortex A9 處理器系列:i.MX6 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:1 GHz 指令/數(shù)據(jù)緩存: 數(shù)據(jù) RAM 大小:128 KB 數(shù)據(jù) ROM 大小: 工作電源電壓: 最大工作溫度:+ 95 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MAPBGA-432
79RC32K438300BBI 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:IDTTM InterpriseTM Integrated Communications Processor
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