- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄382825 > 78Q2132 (TDK Corporation) 1/10BASE-T HomePNA/Ethernet Transceiver PDF資料下載
參數(shù)資料
| 型號： | 78Q2132 |
| 廠商： | TDK Corporation |
| 英文描述： | 1/10BASE-T HomePNA/Ethernet Transceiver |
| 中文描述： | 1/10BASE-T電話線網(wǎng)絡(luò)/以太網(wǎng)收發(fā)器 |
| 文件頁數(shù)： | 18/36頁 |
| 文件大小： | 172K |
| 代理商： | 78Q2132 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁當前第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁
78Q2132
1/10BASE-TX
HomePNA/Ethernet Transceiver
18
REGISTER DESCRIPTION
(continued)
MR17 - INTERRUPT CONTROL/STATUS REGISTER
(continued)
BIT
17.6
SYMBOL
RXER INT
TYPE
RC, 0
DESCRIPTION
Receive Error Interrupt: This bit is reserved for 100Base-TX
17.5
PRX INT
RC, 0
Page Received Interrupt: This bit is set when a new page has been
received from the link partner during auto-negotiation.
17.4
PDF INT
RC, 0
Parallel Detect Fault Interrupt: This bit is set by the auto-negotiation
logic when a parallel detect fault condition is indicated.
17.3
LP-ACK INT
RC, 0
Link Partner Acknowledge Interrupt: This bit is set by the auto-
negotiation logic when FLP bursts are received with the acknowledge
bit set.
17.2
LS-CHG INT
RC, 0
Link Status Change Interrupt: This bit is set when the link transitions
from an OK status to a fail status or vice versa.
17.1
RFAULT INT
RC, 0
Remote Fault Interrupt: This bit is set when a remote fault condition
has been indicated by the link partner.
17.0
ANEG-COMP INT
RC, 0
Auto-Negotiation Complete Interrupt: This bit is set by the auto-
negotiation logic upon successful completion of auto-negotiation.
MR18 - DIAGNOSTIC REGISTER
18.15:13
RSVD
R, 0
RESERVED
18.12
ANEGF
R,0,RC
AUTO-NEGOTIATION FAIL: This bit is set when auto-negotiation
completes and no common technology was found. It remains set until
read.
18.11
DPLX
R, 0
DUPLEX: If set it indicates full-duplex operation. If clear it indicates
half-duplex mode.
RATE: Always clear indicating 10BASE-T mode.
18.10
RATE
R, 0
18.9
RX-PASS
R, 0
RECEIVE PASS: In 10BASE-T mode, this bit indicates that Manchester
data has been detected.
18.8
RX-LOCK
R, 0
RECEIVE LOCK: Indicates that the receive PLL has locked onto the
received signal for the selected speed of operation (10BASE-T). This
bit is cleared whenever a cycle-slip occurs, and will remain cleared until
it is read.
18.7:0
RSVD
R, W, 0
RESERVED. Must be zero.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 7901001QX | 8-Bit Microprocessor |
| 79RC32334-150BBG | IDT Interprise Integrated Communications Processor |
| 79RC32334-150BBGI | IDT Interprise Integrated Communications Processor |
| 79RC32334-150BBI | IDT Interprise Integrated Communications Processor |
| 79RC32334 | IDT Interprise Integrated Communications Processor |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 78Q2133 | 制造商:Maxim Integrated Products 功能描述: |
| 78Q2133/F | 功能描述:以太網(wǎng) IC 10/100 Fast Ethernet MicroPHY RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray |
| 78Q2133/F1 | 功能描述:以太網(wǎng) IC RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray |
| 78Q2133-DB | 功能描述:以太網(wǎng)開發(fā)工具 78Q2133 Demo Brd RoHS:否 制造商:Micrel 產(chǎn)品:Evaluation Boards 類型:Ethernet Transceivers 工具用于評估:KSZ8873RLL 接口類型:RMII 工作電源電壓: |
| 78Q2133-DIE | 制造商:Maxim Integrated Products 功能描述:78Q2133-DIE NOTE: MOQ = 10500 DIE (1 WAFER) - Gel-pak, waffle pack, wafer, diced wafer on film |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。