參數(shù)資料
型號(hào)： 78Q2132
廠(chǎng)商： TDK Corporation
英文描述： 1/10BASE-T HomePNA/Ethernet Transceiver
中文描述： 1/10BASE-T電話(huà)線(xiàn)網(wǎng)絡(luò)/以太網(wǎng)收發(fā)器
文件頁(yè)數(shù)： 16/36頁(yè)
文件大?。?/td> 172K
代理商： 78Q2132
78Q2132
1/10BASE-TX
HomePNA/Ethernet Transceiver
16
REGISTER DESCRIPTION
(continued)
MR6 - AUTO-NEGOTIATION EXPANSION REGISTER
BIT
SYMBOL
TYPE
DESCRIPTION
6.15:5
6.4
RSVD
PDF
R, 0
R,0,RC
RESERVED: This bit is permanently tied low
PARALLEL DETECTION FAULT: When set, it indicates that more
than one technology was detected during link up. This bit is cleared
when read.
6.3
LPNPA
R,0
LINK PARTNER NEXT PAGE ABLE: When set, it indicates that the
link partner supports the next page function.
6.2
6.1
NPA
PRX
R,0
NEXT PAGE ABLE: Not supported; permanently tied low
R,0,RC
PAGE RECEIVED: Set when a properly matched link code word
has been received into the Auto-negotiation Link Partner. This bit is
cleared when read.
6.0
LPANEGA
R, 0
LINK PARTNER AUTO-NEGOTIATION ABLE: When set, it
indicates that the link partner is able to participate in the auto-
negotiation function.
MR16 - VENDOR SPECIFIC REGISTER
BIT
SYMBOL
TYPE
DESCRIPTION
16.15
RSVD
R0
Reserved
16.14
INT LEVEL
R, W, 0
When this bit is a zero, the INTR pin is forced low to signal an
interrupt. Setting this bit causes the INTR pin to be forced high to
signal an interrupt.
16.13
RSVD
R, 0
RESERVED
16.12
16.11
RSVD
R, W, 0
R, W, 0
RESERVED
SQE TEST
INHIBIT
Setting this bit disables 10BASE-T SQE testing. By default, when
this bit is a zero, the SQE test is performed by generating a COL
pulse following the completion of a packet transmission.
16.10
NATURAL
LOOPBACK
R, W, (0)
Setting this bit causes transmitted data on TXD to be automatically
looped back to the RXD receive signals when 10BASE-T mode is
enabled. In HomePNA mode, the default is 1 and the transmit
symbol NT_SYM is looped back into the receive symbol RD_SYM.
16.9
GPIO1_DAT
R, W, 0
GENERAL PURPOSE I/O 1 DATA BIT: When the GPIO_DIR is set,
this bit reflects the value of the GPIO1 pin. When the GPIO1_DIR is
reset, the value of this bit is driven onto the GPIO1 pin.
16.8
GPIO1_DIR
R, W, 1
GENERAL PURPOSE I/O 1 DIRECTION BIT: Setting this bit
configures the GPIO1 pin as an input. Resetting configures GPOI_1
as an output.
GENERAL PURPOSE I/O 0 DATA BIT: When the GPIO0_DIR is set,
this bit reflects the value of the GPIO0 pin. When the GPIO0_DIR is
reset, the value of this bit is driven onto the GPIO0 pin.
16.7
GPIO0_DAT
R, W, 0
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
78Q2133 制造商:Maxim Integrated Products 功能描述:
78Q2133/F 功能描述:以太網(wǎng) IC 10/100 Fast Ethernet MicroPHY RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray
78Q2133/F1 功能描述:以太網(wǎng) IC RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray
78Q2133-DB 功能描述:以太網(wǎng)開(kāi)發(fā)工具 78Q2133 Demo Brd RoHS:否 制造商:Micrel 產(chǎn)品:Evaluation Boards 類(lèi)型:Ethernet Transceivers 工具用于評(píng)估:KSZ8873RLL 接口類(lèi)型:RMII 工作電源電壓:
78Q2133-DIE 制造商:Maxim Integrated Products 功能描述:78Q2133-DIE NOTE: MOQ = 10500 DIE (1 WAFER) - Gel-pak, waffle pack, wafer, diced wafer on film
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