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| 型號(hào)： | 7536 |
| 英文描述： | Low Quiescent Current LDO, -40C to +125C, 3-SOT-23, T/R |
| 中文描述： | 7536組數(shù)據(jù)表數(shù)據(jù)表660K/SEP.05.00 |
| 文件頁(yè)數(shù)： | 40/46頁(yè) |
| 文件大小： | 660K |
| 代理商： | 7536 |
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SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
7536 Group
MITSUBISHI MICROCOMPUTERS
39
Table 9 Electrical characteristics (1)
(V
CC
= 4.1 to 5.5 V, V
SS
= 0 V, Ta = –20 to 85
°
C, unless otherwise noted)
Min.
V
CC
–
1.5
Typ.
Max.
Symbol
Parameter
Limits
I
OH
=
–
5 mA
V
CC
= 4.1 to 5.5 V
I
OH
=
–
1.0 mA
V
CC
= 4.1 to 5.5 V
V
CC
= 4.4 to 5.25 V
Pull-down through
15k
±
5 % for D+, D-
Pull-up through 1.5k
±
5 % by USBV
REFOUT
for D- (Ta = 0 to 70
°
C)
I
OL
= 5 mA
V
CC
= 4.1 to 5.5 V
I
OL
= 1.5 mA
V
CC
= 4.1 to 5.5 V
V
CC
= 4.4 to 5.25 V
Pull-down through
15k
±
5 % for D+, D-
Pull-up through 1.5k
±
5 % by USBV
REFOUT
for D-(Ta = 0 to 70
°
C)
I
OL
= 15 mA
V
CC
= 4.1 to 5.5 V
I
OL
= 1.5 mA
V
CC
= 4.1 to 5.5 V
V
I
= V
CC
(Pin floating. Pull-up
transistors
“
off
”
)
V
I
= V
CC
V
I
= V
CC
V
I
= V
SS
(Pin floating. Pull-up
transistors
“
off
”
)
V
I
= V
SS
V
I
= V
SS
V
I
= V
SS
(Pull-up transistors
“
on
”
)
Test conditions
V
CC
–
1.0
2.8
“
H
”
output voltage P0
0
–
P0
7
, P1
0
–
P1
6
, P2
0
–
P2
7
,
P3
0
–
P3
7
, P4
0
, P4
1
(Note 1)
“
H
”
output voltage D+, D-
“
L
”
output voltage P0
0
–
P0
7
, P1
0
–
P1
6
, P2
0
–
P2
7
,
P3
7
, P4
0
, P4
1
“
L
”
output voltage D+, D-
“
L
”
output voltage P3
0
–
P3
6
Hysteresis
D+, D-
Hysteresis
CNTR
0
, INT
0
, INT
1
(Note 2),
P0
0
–
P0
7
(Note 3)
R
X
D, S
CLK
, S
DATA
(Note 2)
RESET
P0
0
–
P0
7
, P1
0
–
P1
6
, P2
0
–
P2
7
,
P3
0
–
P3
7
, P4
0
, P4
1
Hysteresis
Hysteresis
“
H
”
input current
“
H
”
input current
RESET
“
H
”
input current
“
L
”
input current
X
IN
P0
0
–
P0
7
, P1
0
–
P1
6
, P2
0
–
P2
7
,
P3
0
–
P3
7
, P4
0
, P4
1
“
L
”
input current
“
L
”
input current
“
L
”
input current
RESET, CNV
SS
X
IN
P0
0
–
P0
7
, P3
0
–
P3
7
RAM hold voltage
V
V
V
OH
V
OH
3.6
V
V
OL
0.3
1.5
V
V
0.3
V
2.0
0.3
V
V
V
OL
V
OL
V
T+
–
V
T
–
V
T+
–
V
T
–
I
IH
V
T+
–
V
T
–
I
IH
I
IL
I
IH
I
IL
I
IL
I
IL
V
RAM
When clock stopped
0.5
0.5
0.4
V
V
V
4
–
4
–
0.2
5.0
5.0
–
5.0
–
5.0
–
0.5
μ
A
μ
A
μ
A
μ
A
μ
A
μ
A
mA
2.0
5.5
V
Note 1:
P1
1
is measured when the P-channel output disable bit of the UART control register (bit 4 of address 001B
16
) is
“
0
”
.
2:
R
X
D, S
CLK
, S
DATA
, INT
0
and INT
1
have hystereses only when bits 0, 1 and 2 of the port P1P3 control register are set to
“
0
”
(
CMOS
level).
3:
It is available only when operating key-on wake-up.
Unit
V
T+
–
V
T
–
0.15
V
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