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參數(shù)資料
| 型號(hào)： | 74VCX16835 |
| 廠商： | Fairchild Semiconductor Corporation |
| 英文描述： | Low Voltage 18-Bit Universal Bus Driver with 3.6V Tolerant Inputs and Outputs |
| 中文描述： | 低電壓18位通用總線容錯(cuò)與3.6V的輸入和輸出驅(qū)動(dòng)器 |
| 文件頁(yè)數(shù)： | 1/8頁(yè) |
| 文件大小： | 77K |
| 代理商： | 74VCX16835 |
2000 Fairchild Semiconductor Corporation
DS500173
www.fairchildsemi.com
October 1998
Revised April 2000
7
74VCX16835
Low Voltage 18-Bit Universal Bus Driver
with 3.6V Tolerant Inputs and Outputs
General Description
The VCX16835 low voltage 18-bit universal bus driver
combines D-type latches and D-type flip-flops to allow data
flow in transparent, latched and clocked modes.
Data flow is controlled by output-enable (OE), latch-enable
(LE), and clock (CLK) inputs. The device operates in
Transparent Mode when LE is held HIGH. The device
operates in clocked mode when LE is LOW and CLK is tog-
gled. Data transfers from the Inputs (I
n
) to Ouputs (O
n
) on a
Positive Edge Transition of the Clock. When OE is LOW,
the output data is enabled. When OE is HIGH the output
port is in a high impedance state.
The 74VCX16835 is designed for low voltage (1.65V to
3.6V) V
CC
applications with I/O capability up to 3.6V.
The 74VCX16835 is fabricated with an advanced CMOS
technology to achieve high speed operation while maintain-
ing low CMOS power dissipation.
Features
I
Compatible with PC100 DIMM module specifications
I
1.65V–3.6V V
CC
specifications provided
I
3.6V tolerant inputs and outputs
I
t
PD
(CP to O
n
)
4.2ns max for 3.0V to 3.6V V
CC
5.2ns max for 2.3V to 2.7V V
CC
9.2ns max for 1.65V to 1.95V V
CC
I
Power-down high impedance inputs and outputs
I
Supports live insertion/withdrawal (Note 1)
I
Static Drive (I
OH
/I
OL
)
±
24mA @ 3.0V
±
18mA @ 2.3V
±
6mA @ 1.65V
I
Latchup performance exceeds 300 mA
I
ESD performance:
Human body model
>
2000V
Machine model
>
200V
Note 1:
To ensure the high-impedance state during power up or power
down, OE should be tied to V
CC
(OE to GND) through a pulldown resistor;
the minimum value of the resistor is determined by the current sourcing
capability of the driver.
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter
“
X
”
to the ordering code.
Order Number
74VCX16835MTD
Package Number
MTD56
Package Description
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
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| 74VCX16835MTD | Low Voltage 18-Bit Universal Bus Driver with 3.6V Tolerant Inputs and Outputs |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 74VCX16835_XBA31162 WAF | 制造商:Fairchild Semiconductor Corporation 功能描述: |
| 74VCX16835GX | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:Low Voltage 18-Bit Universal Bus Driver with 3.6V Tolerant Inputs and Outputs |
| 74VCX16835MTD | 功能描述:總線收發(fā)器 18-Bit Univ Bus Drv RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| 74VCX16835MTD_Q | 功能描述:總線收發(fā)器 18-Bit Univ Bus Drv RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| 74VCX16835MTDX | 功能描述:總線收發(fā)器 18-Bit Univ Bus Drv RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
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