參數(shù)資料
型號(hào): 74LVTH162373MEX
廠商: Fairchild Semiconductor
文件頁(yè)數(shù): 1/7頁(yè)
文件大?。?/td> 0K
描述: IC LATCH TRANSP 16BIT 3ST 48SSOP
產(chǎn)品變化通告: Die Material/Mold Compound Change 10/Sept/2008
標(biāo)準(zhǔn)包裝: 1,000
系列: 74LVTH
邏輯類(lèi)型: D 型透明鎖存器
電路: 8:8
輸出類(lèi)型: 三態(tài)
電源電壓: 2.7 V ~ 3.6 V
獨(dú)立電路: 2
延遲時(shí)間 - 傳輸: 1.4ns
輸出電流高,低: 12mA,12mA
工作溫度: -40°C ~ 85°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 48-BSSOP(0.295",7.50mm 寬)
供應(yīng)商設(shè)備封裝: 48-SSOP
包裝: 帶卷 (TR)
2005 Fairchild Semiconductor Corporation
DS500354
www.fairchildsemi.com
October 2000
Revised June 2005
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74LVTH162373
Low Voltage 16-Bit Transparent Latch with
3-STATE Outputs and
25
: Series Resistors in the Outputs
General Description
The LVTH162373 contains sixteen non-inverting latches
with 3-STATE outputs and is intended for bus oriented
applications. The device is byte controlled. The flip-flops
appear transparent to the data when the Latch Enable (LE)
is HIGH. When LE is LOW, the data that meets the setup
time is latched. Data appears on the bus when the Output
Enable (OE) is LOW. When OE is HIGH, the outputs are in
a high impedance state.
The LVTH162373 is designed with equivalent 25
: series
resistance in both the HIGH and LOW states of the output.
This design reduces line noise in applications such as
memory address drivers, clock drivers, and bus transceiv-
ers/transmitters.
The LVTH162373 data inputs include bushold, eliminating
the need for external pull-up resistors to hold unused
inputs.
These latches are designed for low-voltage (3.3V) VCC
applications, but with the capability to provide a TTL inter-
face to a 5V environment. The LVTH162373 is fabricated
with an advanced BiCMOS technology to achieve high
speed operation similar to 5V ABT while maintaining a low
power dissipation.
Features
s Input and output interface capability to systems at
5V VCC
s Bushold data inputs eliminate the need for external
pull-up resistors to hold unused inputs
s Live insertion/extraction permitted
s Power Up/Down high impedance provides glitch-free
bus loading
s Outputs include equivalent series resistance of 25
: to
make external termination resistors unnecessary and
reduce overshoot and undershoot
s Functionally compatible with the 74 series 16373
s Latch-up performance exceeds 500 mA
s ESD performance:
Human-body model
! 2000V
Machine model
! 200V
Charged-device model
! 1000V
Ordering Code:
Note 1: Use this Order Number to receive devices in Tape and Reel.
Logic Symbol
Order Number
Package
Number
Package Description
74LVTH162373MEA
MS48A
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide
[TUBES]
74LVTH162373MEX
(Note 1)
MS48A
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide
[TAPE and REEL]
74LVTH162373MTD
MTD48
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
[TUBES]
74LVTH162373MTX
(Note 1)
MTD48
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
[TAPE and REEL]
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74LVTH162373MTD 功能描述:閉鎖 16-Bit Trans Latch RoHS:否 制造商:Micrel 電路數(shù)量:1 邏輯類(lèi)型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數(shù)量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時(shí)間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel
74LVTH162373MTD_Q 功能描述:閉鎖 16-Bit Trans Latch RoHS:否 制造商:Micrel 電路數(shù)量:1 邏輯類(lèi)型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數(shù)量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時(shí)間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel
74LVTH162373MTX 功能描述:閉鎖 16-Bit Trans Latch RoHS:否 制造商:Micrel 電路數(shù)量:1 邏輯類(lèi)型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數(shù)量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時(shí)間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel
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74LVTH162374_ZAB3026B WAF 制造商:Fairchild Semiconductor Corporation 功能描述: