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參數(shù)資料
| 型號(hào)： | 74LVC544A |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Octal Transparent D-Type Latches With 3-State Outputs 20-PDIP -40 to 85 |
| 中文描述： | 八路?注冊(cè)的收發(fā)器類型，反相三態(tài) |
| 文件頁(yè)數(shù)： | 2/10頁(yè) |
| 文件大?。?/td> | 90K |
| 代理商： | 74LVC544A |
Philips Semiconductors
Product specification
74LVC544A
Octal D-type registered transceiver, inverting
(3-State)
2
1998 Jul 29
853-2107 19804
FEATURES
Wide supply voltage range of 1.2V to 3.6V
In accordance with JEDEC standard no. 8-1A
CMOS low power consumption
Direct interface with TTL levels
Combines 74LVC640 and 74LVC533 type functions in one chip
Octal transceiver with D-type latch
Back-to-back registers for storage
Separate controls for data flow in each direction
3-State inverting outputs for bus oriented applications
5 Volt tolerant inputs/outputs, for interfacing with 5 Volt logic
DESCRIPTION
The 74LVC544A is a high performance, low-power, low-voltage
Si-gate CMOS device and superior to most advanced CMOS
compatible TTL families.
Inputs can be driven from either 3.3V or 5.0V devices. In 3-State
operation, outputs can handle 5V. This feature allows the use of
these devices as translators in a mixed 3.3V/5V environment.
The 74LVC544A is an octal registered inverting transceiver
containing two sets of D-type latches for temporary storage of the
data flow in either direction. Separate latch enable (LEAB, LEBA)
and output enable (OEAB, OEBA) inputs are provided for each
register to permit independent control of inputting and outputting in
either direction of the data flow.
The ‘544A’ contains eight D-type latches with separate inputs and
controls for each set. For data flow from A to B, for example, the
A-to-B enable (EAB) input must be LOW in order to enter data from
A0–A7 or take data from B0–B7, as indicated in the function table.
With EAB LOW, a LOW signal on the A-to-B latch enable (LEAB)
input makes the A-to-B latches transparent; a subsequent
LOW-to-HIGH transition of the LEAB signal puts the A data into the
latches where it is stored and the B outputs no longer change with
the A inputs. With EAB and OEAB both LOW, the 3-State B output
buffers are active and display the data present at the outputs of the
A latches.
QUICK REFERENCE DATA
GND = 0V; T
amb
= 25
°
C; t
r
= t
f
SYMBOL
2.5 ns
PARAMETER
CONDITIONS
TYPICAL
UNIT
t
PHL
/t
PLH
Propagation delay
An to Bn
Input capacitance
Input/output capacitance
Power dissipation capacitance per latch
C
L
= 50pF
V
CC
= 3.3V
4
ns
C
I
C
I/O
C
PD
NOTES:
1. C
PD
is used to determine the dynamic power dissipation (P
D
in
μ
W)
P
D
= C
PD
V
CC2
x f
i
Σ
(C
L
f
i
= input frequency in MHz; C
L
= output load capacitance in pF;
f
o
= output frequency in MHz; V
CC
= supply voltage in V;
Σ
(C
V
CC2
f
o
) = sum of the outputs.
2. The condition is V
I
= GND to V
CC.
5.0
10
30
pF
pF
pF
Notes 1, 2
V
CC2
f
o
) where:
ORDERING AND PACKAGE INFORMATION
PACKAGES
TEMPERATURE RANGE
OUTSIDE NORTH
AMERICA
NORTH AMERICA
PKG. DWG. #
24-Pin Plastic SO
–40
°
C to +85
°
C
74LVC544A D
74LVC544A D
SOT137-1
24-Pin Plastic SSOP Type II
–40
°
C to +85
°
C
–40
°
C to +85
°
C
74LVC544A DB
74LVC544A DB
SOT340-1
24-Pin Plastic TSSOP Type I
74LVC544A PW
7LVC544APW DH
SOT355-1
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 74LVC544AD | 功能描述:總線收發(fā)器 OCTAL LATCHED TRANSCEIVER W/DU RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| 74LVC544AD,112 | 功能描述:總線收發(fā)器 OCTAL LATCHED RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| 74LVC544AD,118 | 功能描述:總線收發(fā)器 OCTAL LATCHED RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| 74LVC544ADB | 功能描述:總線收發(fā)器 OCTAL LATCHED TRANSCEIVER W/DU RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| 74LVC544ADB,112 | 功能描述:總線收發(fā)器 OCTAL LATCHED RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
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