參數(shù)資料
型號(hào): 74LV595PWDH
廠商: NXP SEMICONDUCTORS
元件分類: 通用總線功能
英文描述: 8-bit serial-in/serial or parallel-out shift register with output latches 3-State
中文描述: LV/LV-A/LVX/H SERIES, 8-BIT RIGHT SERIAL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, PDSO16
封裝: 4.40 MM, PLASTIC, MO-153, SOT-403-1, TSSOP-16
文件頁(yè)數(shù): 3/16頁(yè)
文件大?。?/td> 137K
代理商: 74LV595PWDH
Philips Semiconductors
Product specification
74LV595
8-bit serial-in/serial or parallel-out shift register
with output latches (3-State)
1998 Apr 20
3
PIN DESCRIPTION
PIN
NUMBER
SYMBOL
FUNCTION
15, 1, 2, 3,
4, 5, 6, 7
Q
0
to Q
7
Parallel data output
8
GND
Ground (0V)
9
Q
7’
Serial data output
10
MR
Master reset (active LOW)
11
SH
CP
Shift register clock input
12
ST
CP
Storage register clock input
13
OE
Output enable input (active LOW)
14
D
S
Serial data input
16
V
CC
Positive supply voltage
PIN CONFIGURATION
SV00720
14
13
12
11
10
9
8
7
6
5
4
3
2
1
15
16
GND
V
CC
Q
1
Q
2
Q
3
Q
4
Q
5
Q
6
Q
7
Q
0
D
S
OE
ST
CP
SH
CP
MR
Q
7’
FUNCTION TABLE
INPUTS
OUTPUTS
FUNCTION
SH
CP
ST
CP
OE
MR
D
S
Q
7’
Qn
X
X
L
L
X
L
NC
A LOW level on MR only affects the shift registers
X
L
L
X
L
L
Empty shift register loaded into storage register
X
X
H
L
X
L
Z
Shift register clear. Parallel outputs in high-impedance OFF-states
X
L
H
H
Q
6’
NC
Logic high level shifted into shift register stage 0. Contents of all shift
register stages shifted through, e.g. previous state of stage 6 (internal
Q
6’
) appears on the serial output (Q
7’
)
X
L
H
X
NC
Q
n’
Contents of shift register stages (internal Qn’) are transferred to the
storage register and parallel output stages
L
H
X
Q
6’
Q
n’
Contents of shift register shifted through. Previous contents of the shift
register are transferred to the storage register and the parallel output
stages
H = HIGH voltage level
L
= LOW voltage level
X = Don’t care
Z
= High impedance OFF-state
NC= No change
= LOW-to-HIGH clock transition
= HIGH-to-LOW transition
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