參數(shù)資料
型號(hào): 74LV595
廠商: NXP Semiconductors N.V.
英文描述: 8-bit serial-in/serial or parallel-out shift register with output latches (3-State)(帶輸出鎖存的8位串聯(lián)輸入/串聯(lián)或并聯(lián)輸出移位寄存器(三態(tài)))
中文描述: 8位serial-in/serial或并行輸出的移位寄存器的輸出鎖存器(3態(tài))(帶輸出鎖存的8位串聯(lián)輸入/串聯(lián)或并聯(lián)輸出移位寄存器(三態(tài)))
文件頁(yè)數(shù): 10/16頁(yè)
文件大?。?/td> 137K
代理商: 74LV595
Philips Semiconductors
Product specification
74LV595
8-bit serial-in/serial or parallel-out shift register
with output latches (3-State)
1998 Apr 20
10
AC WAVEFORMS (Continued)
V
M
= 1.5V at V
CC
V
M
= 0.5 * V
CC
at V
CC
V
and V
OH
are the typical output voltage drop that occur with the
output load.
V
X
= V
OL
+
0.3V at V
CC
2.7V
V
X
= V
OL
+ 0.1V
CC
at V
CC
<
2.7V
V
Y
= V
OH
– 0.3V at V
CC
2.7V
V
Y
= V
OH
– 0.1V
CC
at V
CC
<
2.7V
2.7V
2.7V
SV00728
V
M
MR INPUT
SH
CP
INPUT
Q
7
’ OUTPUT
V
M
V
M
t
rem
t
W
t
PHL
V
I
V
I
GND
GND
V
OL
V
OH
Figure 5. Master reset (MR) pulse width, the master reset to
output (Q
7’
) propagation delay and the master reset to shift
clock (SH
CP
) removal time.
TEST CIRCUIT
SWITCH POSITION
PULSE
GENERATOR
R
T
V
I
D.U.T.
V
O
C
L
V
CC
R
L
= 1k
Test Circuit for switching times
Open
GND
S
1
DEFINITIONS
R
L
= Load resistor
C
L
= Load capacitance includes jig and probe capacitance
R
T
= Termination resistance should be equal to Z
OUT
of pulse generators.
V
CC
V
I
< 2.7V
V
CC
TEST
S
1
t
PLH/
t
PHL
Open
2
V
CC
t
PLZ/
t
PZL
2.7V
2.7–3.6V
t
PHZ/
t
PZH
GND
50pF
SV00895
R
L
= 1k
2 * V
CC
Figure 6. Load circuitry for switching times.
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