參數(shù)資料
型號: 74LV132PWDH
廠商: NXP SEMICONDUCTORS
元件分類: 通用總線功能
英文描述: Quad 2-input NAND Schmitt-trigger
中文描述: LV/LV-A/LVX/H SERIES, QUAD 2-INPUT NAND GATE, PDSO14
文件頁數(shù): 5/12頁
文件大小: 117K
代理商: 74LV132PWDH
Philips Semiconductors
Product specification
74LV132
Quad 2-input NAND Schmitt-trigger
1998 Apr 28
5
DC CHARACTERISTICS (Continued)
Over recommended operating conditions. Voltages are referenced to GND (ground = 0V).
SYMBOL
PARAMETER
TEST CONDITIONS
LIMITS
UNIT
-40
°
C to +85
°
C
-40
°
C to +125
°
C
V
OL
LOW level output
voltage;
STANDARD
outputs
V
CC
= 3.0V; V
I
= V
IH
or V
IL;
I
O
= 6mA
0.25
0.40
0.50
V
V
CC
= 4.5V; V
I
= V
IH
or V
IL;
I
O
= 12mA
0.35
0.55
0.65
I
I
Input leakage
current
Quiescent supply
current; SSI
Additional
quiescent supply
current per input
V
CC
= 5.5V; V
I
= V
CC
or GND
1.0
1.0
μ
A
I
CC
V
CC
= 5.5V; V
I
= V
CC
or GND; I
O
= 0
20.0
40
μ
A
I
CC
V
CC
= 2.7V to 3.6V; V
I
= V
CC
– 0.6V
500
850
μ
A
NOTE:
1. All typical values are measured at T
amb
= 25
°
C.
TRANSFER CHARACTERISTICS
Voltages are referenced to GND = 0V.
CONDITION
LIMITS
SYMBOL
PARAMETER
WAVEFORM
–40 to +85
°
C
TYP
1
–40 to +125
°
C
UNIT
V
CC
(V)
1.2
MIN
MAX
MIN
MAX
0.70
2.0
0.8
1.10
1.4
0.8
1.4
2.7
1.0
1.45
2.0
1.0
2.0
V
T+
Positive going
threshold
Figures
1 and 2
3.0
1.2
1.60
2.2
1.2
2.2
V
3.6
1.5
1.95
2.4
1.5
2.4
4.5
1.7
2.50
3.2
1.7
3.2
5.5
2.1
3.00
3.9
2.1
3.9
1.2
0.34
2.0
0.3
0.65
0.9
0.3
0.9
2.7
0.4
0.90
1.4
0.4
1.4
V
T–
Negative going
threshold
Figures
1 and 2
3.0
0.6
1.05
1.5
0.6
1.5
V
3.6
0.8
1.30
1.8
0.8
1.8
4.5
0.9
1.60
2.0
0.9
2.0
5.5
1.2
2.00
2.6
1.2
2.6
1.2
0.30
2.0
0.2
0.55
0.8
0.2
0.8
2.7
0.3
0.60
1.1
0.3
1.1
V
H
Hysteresis
– V
(V
T+
V
T–
)
Figures
1 and 2
3.0
0.4
0.65
1.2
0.4
1.2
V
3.6
0.4
0.70
1.2
0.4
1.2
4.5
0.4
0.80
1.4
0.4
1.4
5.5
0.6
1.00
1.5
0.6
1.5
NOTE:
1. Unless otherwise stated, all typical values are at T
amb
= 25
°
C.
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