參數(shù)資料
型號(hào): 74LS243
廠商: Fairchild Semiconductor Corporation
英文描述: Quadruple Bus Transceiver
中文描述: 四重總線收發(fā)器
文件頁數(shù): 1/5頁
文件大?。?/td> 52K
代理商: 74LS243
2000 Fairchild Semiconductor Corporation
DS006412
www.fairchildsemi.com
August 1986
Revised January 2000
D
DM74LS243
Quadruple Bus Transceiver
General Description
This four data line transceiver is designed for asynchro-
nous two-way communications between data buses. It can
be used to drive terminated lines down to 133
.
Features
I
Two-way asynchronous communication between data
buses
I
PNP inputs reduce DC loading on bus line
I
Hysteresis at data inputs improves noise margin
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Function Table
I
=
Input
O
=
Output
H
=
HIGH Logic Level
L
=
LOW Logic Level
Note 1:
Possibly destructive oscillation may occur if the transceivers are
enabled in both directions at once.
Order Number
DM74LS243M
DM74LS243N
Package Number
M14A
N14A
Package Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Control
Inputs
Data Port
Status
G AB
H
L
H
L
GBA
H
H
L
L
A
O
B
I
(Note 1)
(Note 1)
ISOLATED
I
O
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