參數(shù)資料
型號： 74LCX112
廠商： Fairchild Semiconductor Corporation
英文描述： Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs
中文描述： 低電壓雙JK負沿觸發(fā)器與5V容限輸入拖鞋
文件頁數(shù)： 1/9頁
文件大?。?/td> 99K
代理商： 74LCX112
2001 Fairchild Semiconductor Corporation
DS012424
www.fairchildsemi.com
June 1998
Revised February 2001
7
74LCX112
Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop
with 5V Tolerant Inputs
General Description
The LCX112 is a dual J-K flip-flop. Each flip-flop has inde-
pendent J, K, PRESET, CLEAR, and CLOCK inputs with Q,
Q outputs. These devices are edge sensitive and change
state on the negative going transition of the clock pulse.
Clear and preset are independent of the clock and accom-
plished by a low logic level on the corresponding input.
LCX devices are designed for low voltage (3.3V or 2.5)
operation with the added capability of interfacing to a 5V
signal environment.
The 74LCX112 is fabricated with advanced CMOS technol-
ogy to achieve high speed operation while maintaining
CMOS low power dissipation.
Features
I
5V tolerant inputs
I
2.3V–3.6V V
CC
specifications provided
I
7.5 ns t
PD
max (V
CC
=
3.3V), 10
μ
A I
CC
max
I
Power down high impedance inputs and outputs
I
±
24 mA output drive (V
CC
=
3.0V)
I
Implements patented noise/EMI reduction circuitry
I
Latch-up performance exceeds 500 mA
I
ESD performance:
Human body model
>
2000V
Machine model
>
2000V
Ordering Code:
Devices also available in Tape and Reel. Specify by appending suffix letter
“
X
”
to the ordering code.
Logic Symbol
IEEE/IEC
Connection Diagram
Pin Descriptions
Order Number
74LCX112M
74LCX112SJ
74LCX112MTC
Package Number
M16A
M16D
MTC16
Package Description
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Pin Names
Description
J
1
, J
2
, K
1
, K
2
CP
1
, CP
2
C
D1
, C
D2
S
D1
, S
D2
Q
1
, Q
2
, Q
1
, Q
2
Data Inputs
Clock Pulse Inputs (Active Falling Edge)
Direct Clear Inputs (Active LOW)
Direct Set Inputs (Active LOW)
Outputs
相關PDF資料
PDF描述
74LCX112M Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs
74LCX112MTC Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs
74LCX112SJ Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs
74LCX112MX J-K-Type Flip-Flop
74LCX112SJX J-K-Type Flip-Flop
相關代理商/技術參數(shù)
參數(shù)描述
74LCX112M 功能描述:觸發(fā)器 J-K Neg Flip-Flop RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel
74LCX112M_Q 功能描述:觸發(fā)器 J-K Neg Flip-Flop RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel
74LCX112MTC 功能描述:觸發(fā)器 J-K Neg Flip-Flop RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel
74LCX112MTC_Q 功能描述:觸發(fā)器 J-K Neg Flip-Flop RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel
74LCX112MTCX 功能描述:觸發(fā)器 J-K Neg Flip-Flop RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel
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