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參數(shù)資料
| 型號(hào)： | 74LCX10SJX |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類(lèi)： | 通用總線功能 |
| 英文描述： | Low Voltage Triple 3-Input NAND Gate with 5V Tolerant Inputs |
| 中文描述： | LVC/LCX/Z SERIES, TRIPLE 3-INPUT NAND GATE, PDSO14 |
| 封裝： | 5.30 MM, EIAJ TYPE2, SOP-14 |
| 文件頁(yè)數(shù)： | 1/8頁(yè) |
| 文件大小： | 107K |
| 代理商： | 74LCX10SJX |
2005 Fairchild Semiconductor Corporation
DS500453
www.fairchildsemi.com
June 2000
Revised February 2005
7
74LCX10
Low Voltage Triple 3-Input NAND Gate
with 5V Tolerant Inputs
General Description
The LCX10 contains three 3-input NAND gates. The inputs
tolerate voltages up to 7V allowing the interface of 5V sys-
tems to 3V systems.
The 74LCX10 is fabricated with advanced CMOS technol-
ogy to achieve high speed operation while maintaining
CMOS low power dissipation.
Features
I
5V tolerant inputs
I
2.3V–3.6V V
CC
specifications provided
I
4.9 ns t
PD
max (V
CC
3.3V), 10
P
A I
CC
max
I
Power down high impedance inputs and outputs
I
r
24 mA output drive (V
CC
3.0V)
I
Implements patented noise/EMI reduction circuitry
I
Latch-up performance exceeds 500 mA
I
ESD performance:
Human body model
!
2000V
Machine model
!
200V
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter
“
X
”
to the ordering code.
Pb-Free package per JEDEC J-STD-020B.
Logic Symbol
IEEE/IEC
Connection Diagram
Pin Descriptions
Truth Table
O
n
A
n
B
n
C
n
H
HIGH Voltage Level
L
LOW Voltage Level
X
Immaterial
Order Number
74LCX10M
74LCX10SJ
74LCX10MTC
Package Number
M14A
M14D
MTC14
Package Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Pin Names
A
n
, B
n
, C
n
O
n
Description
Inputs
Outputs
A
n
X
X
L
H
B
n
X
L
X
H
C
n
L
X
X
H
O
n
H
H
H
L
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| 74LCX112MTCX | J-K-Type Flip-Flop |
| 74LCX112 | Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs |
| 74LCX112M | Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs |
| 74LCX112MTC | Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs |
| 74LCX112SJ | Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 74LCX11 | 制造商:FAIRCHILD 制造商全稱(chēng):Fairchild Semiconductor 功能描述:Low Voltage Triple 3-Input AND Gate with 5V Tolerant Inputs |
| 74LCX11_08 | 制造商:FAIRCHILD 制造商全稱(chēng):Fairchild Semiconductor 功能描述:Low Voltage Triple 3-Input AND Gate with 5V Tolerant Inputs |
| 74LCX112 | 制造商:FAIRCHILD 制造商全稱(chēng):Fairchild Semiconductor 功能描述:Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs |
| 74LCX112M | 功能描述:觸發(fā)器 J-K Neg Flip-Flop RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類(lèi)型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類(lèi)型:CMOS 輸出類(lèi)型: 傳播延遲時(shí)間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| 74LCX112M_Q | 功能描述:觸發(fā)器 J-K Neg Flip-Flop RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類(lèi)型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類(lèi)型:CMOS 輸出類(lèi)型: 傳播延遲時(shí)間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
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