參數(shù)資料
型號(hào)： 74HCT4515PW
廠商： NXP SEMICONDUCTORS
元件分類： 通用總線功能
英文描述： 4-Bit Synchronous Up/Down Binary Counters 16-SOIC -40 to 85
中文描述： HCT SERIES, OTHER DECODER/DRIVER, INVERTED OUTPUT, PDSO24
文件頁(yè)數(shù)： 7/8頁(yè)
文件大?。?/td> 64K
代理商： 74HCT4515PW
September 1993
7
Philips Semiconductors
Product specification
4-to-16 line decoder/demultiplexer with
input latches; inverting
74HC/HCT4515
DC CHARACTERISTICS FOR 74HCT
For the DC characteristics see
“74HC/HCT/HCU/HCMOS Logic Family Specifications”
.
Output capability: standard
I
CC
category: MSI
Note to HCT types
The value of additional quiescent supply current (
I
CC
) for a unit load of 1 is given in the family specifications.
To determine
I
CC
per input, multiply this value by the unit load coefficient shown in the table below.
AC CHARACTERISTICS FOR 74HCT
GND = 0 V; t
r
= t
f
= 6 ns; C
L
= 50 pF
INPUT
UNIT LOAD COEFFICIENT
A
n
LE
E
0.65
1.40
1.00
SYMBOL PARAMETER
T
amb
(
°
C)
UNIT
TEST CONDITIONS
74HCT
V
CC
(V)
WAVEFORMS
+25
40 to+85
40 to +125
min.
typ.
max.
min. max.
min.
max.
t
PHL
/ t
PLH
propagation delay
A
n
to Q
n
propagation delay
LE to Q
n
propagation delay
E to Q
n
output transition time
30
55
69
83
ns
4.5
Fig.6
t
PHL
/ t
PLH
29
50
63
75
ns
4.5
Fig.6
t
PHL
/ t
PLH
18
40
50
60
ns
4.5
Fig.6
t
THL
/ t
TLH
7
15
19
22
ns
4.5
Fig.6
t
W
latch enable pulse width
HIGH
set-up time
A
n
to LE
hold time
A
n
to LE
16
3
20
24
ns
4.5
Fig.7
t
su
18
9
23
27
ns
4.5
Fig.7
t
h
3
2
3
3
ns
4.5
Fig.7
相關(guān)PDF資料
PDF描述
74HCT4515 4-to-16 line decoder/demultiplexer with input latches；inverting(帶輸入鎖存的4-16線譯碼器/多路分解器 ；反相)
74HC4515 4-to-16 line decoder/demultiplexer with input latches; inverting
74HC4515DB 4-to-16 line decoder/demultiplexer with input latches; inverting
74HC4515PW 4-to-16 line decoder/demultiplexer with input latches; inverting
74HCT4515DB 4-Bit Synchronous Up/Down Binary Counters 16-SOIC -40 to 85
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