參數(shù)資料
型號(hào): 74HCT4515PW
廠商: NXP SEMICONDUCTORS
元件分類: 通用總線功能
英文描述: 4-Bit Synchronous Up/Down Binary Counters 16-SOIC -40 to 85
中文描述: HCT SERIES, OTHER DECODER/DRIVER, INVERTED OUTPUT, PDSO24
文件頁(yè)數(shù): 6/8頁(yè)
文件大小: 64K
代理商: 74HCT4515PW
September 1993
6
Philips Semiconductors
Product specification
4-to-16 line decoder/demultiplexer with
input latches; inverting
74HC/HCT4515
DC CHARACTERISTICS FOR 74HC
For the DC characteristics see
“74HC/HCT/HCU/HCMOS Logic Family Specifications”
.
Output capability: standard
I
CC
category: MSI
AC CHARACTERISTICS FOR 74HC
GND = 0 V; t
r
= t
f
= 6 ns; C
L
= 50 pF
SYMBOL
PARAMETER
T
amb
(
°
C)
UNIT
TEST CONDITIONS
74HC
V
CC
(V)
WAVEFORMS
+25
40 to +85
40 to +125
min.
typ.
max.
min.
max.
min.
max.
t
PHL
/ t
PLH
propagation delay
A
n
to Q
n
80
29
23
66
24
19
50
18
14
19
7
6
14
5
4
28
10
8
11
4
3
250
50
43
225
45
38
175
35
30
75
15
13
315
63
54
280
56
48
220
44
37
95
19
16
375
75
64
340
68
58
265
53
45
110
22
19
ns
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
Fig.6
t
PHL
/ t
PLH
propagation delay
LE to Q
n
ns
Fig.6
t
PHL
/ t
PLH
propagation delay
E to Q
n
ns
Fig.6
t
THL
/ t
TLH
output transition time
ns
Fig.6
t
W
latch enable pulse width
HIGH
75
15
13
90
18
15
0
0
0
95
19
16
115
23
20
0
0
0
110
22
19
135
27
23
0
0
0
ns
Fig.7
t
su
set-up time
A
n
to LE
ns
Fig.7
t
h
hold time
A
n
to LE
ns
Fig.7
相關(guān)PDF資料
PDF描述
74HCT4515 4-to-16 line decoder/demultiplexer with input latches;inverting(帶輸入鎖存的4-16線譯碼器/多路分解器 ;反相)
74HC4515 4-to-16 line decoder/demultiplexer with input latches; inverting
74HC4515DB 4-to-16 line decoder/demultiplexer with input latches; inverting
74HC4515PW 4-to-16 line decoder/demultiplexer with input latches; inverting
74HCT4515DB 4-Bit Synchronous Up/Down Binary Counters 16-SOIC -40 to 85
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