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參數(shù)資料
| 型號： | 74HC74DG |
| 廠商： | ON SEMICONDUCTOR |
| 元件分類： | 通用總線功能 |
| 英文描述： | Dual D Flip−Flop with Set and Reset High−Performance Silicon−Gate CMOS |
| 中文描述： | HC/UH SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14 |
| 封裝： | LEAD FREE, SOIC-14 |
| 文件頁數(shù)： | 2/8頁 |
| 文件大小： | 143K |
| 代理商： | 74HC74DG |
74HC74
http://onsemi.com
2
RESET 1
DATA 1
CLOCK 1
SET 1
RESET 2
DATA 2
CLOCK 2
SET 2
1
2
3
4
13
12
11
10
5
6
9
8
Q1
Q1
Q2
Q2
PIN 14 = V
CC
PIN 7 = GND
FUNCTION TABLE
Inputs
Outputs
Q
H
L
H*
H
L
No Change
No Change
No Change
Set Reset Clock Data
L
H
H
L
L
L
H
H
H
H
H
H
H
H
H
H
Q
L
H
H*
L
H
X
X
X
X
X
X
H
L
X
X
X
L
H
*Both outputs will remain high as long as Set and Reset are low, but the output
states are unpredictable if Set and Reset go high simultaneously.
LOGIC DIAGRAM
PIN ASSIGNMENT
SET 1
CLOCK 1
DATA 1
RESET 1
11
12
13
14
8
9
10
5
4
3
2
1
7
6
SET 2
CLOCK 2
DATA 2
RESET 2
V
CC
Q2
Q2
GND
Q1
Q1
Symbol
Parameter
V
CC
DC Supply Voltage (Referenced to GND)
V
in
DC Input Voltage (Referenced to GND)
V
out
DC Output Voltage (Referenced to GND)
I
in
DC Input Current, per Pin
I
out
DC Output Current, per Pin
I
CC
DC Supply Current, V
CC
and GND Pins
P
D
Power Dissipation in Still Air,
Value
Unit
V
V
V
mA
mA
mA
mW
– 0.5 to + 7.0
– 0.5 to V
CC
+ 0.5
– 0.5 to V
CC
+ 0.5
±
20
±
25
±
50
500
450
– 65 to + 150
SOIC Package
TSSOP Package
T
stg
T
L
Storage Temperature
Lead Temperature, 1 mm from Case for 10 Seconds
(SOIC or TSSOP Package)
C
C
260
300
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress
ratings only. Functional operation above the Recommended Operating Conditions is not implied.
Extended exposure to stresses above the Recommended Operating Conditions may affect device
reliability.
Derating — SOIC Package: – 7 mW/ C from 65 to 125 C
TSSOP Package:
6.1 mW/ C from 65 to 125 C
For high frequency or heavy load considerations, see Chapter 2 of the ON Semiconductor High
Speed CMOS Data Book (DL129/D).
RECOMMENDED OPERATING CONDITIONS
Symbol
V
CC
DC Supply Voltage (Referenced to GND)
V
in
, V
out
DC Input Voltage, Output Voltage (Referenced to GND)
T
A
Operating Temperature, All Package Types
t
r
, t
f
Input Rise and Fall Time
(Figures 1, 2, 3)
Parameter
Min
2.0
0
– 55
0
0
0
0
Max
6.0
V
CC
+ 125
1000
600
500
400
Unit
V
V
C
ns
V
CC
= 2.0 V
V
CC
= 3.0 V
V
CC
= 4.5 V
V
CC
= 6.0 V
This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this high
impedance cir-
cuit. For proper operation, V
in
and
V
out
should be constrained to the
range GND
(V
in
or V
out
)
Unused inputs must always be
tied to an appropriate logic voltage
level (e.g., either GND or V
CC
).
Unused outputs must be left open.
V
CC
.
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| 74HC74DR2G | 功能描述:觸發(fā)器 DUAL D TYPE FLIP FLOP RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| 74HC74D-T | 制造商:NXP 功能描述:Dual SOIC-14 D-Type Flip Flop 制造商:NXP Semiconductors 功能描述:IC, D-TYPE FLIP FLOP, DUAL, SOIC-14; Flip-Flop Type:D; Propagation Delay:14ns; Supply Voltage Min:2V; Supply Voltage Max:6V; Logic Case Style:SOIC; No. of Pins:14; Frequency:82MHz; Output Current:5.2mA; Trigger Type:Positive Edge ;RoHS Compliant: Yes 制造商:NXP Semiconductors 功能描述:Flip Flop D-Type Pos-Edge 2-Element 14-Pin SO T/R |
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