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參數(shù)資料
| 型號(hào)： | 74F670 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | 4 x 4 register file 3-State |
| 中文描述： | 4 × 4寄存器三態(tài) |
| 文件頁數(shù)： | 3/12頁 |
| 文件大?。?/td> | 97K |
| 代理商： | 74F670 |
Philips Semiconductors
Product specification
74F670
4 x 4 register file (3-State)
1990 Jul 12
3
LOGIC SYMBOL
14 13
5
4
15
1
2
3
10
9
Q1
Q0
WA WB RA RB D0 D1 D2 D3
SF01179
7
6
Q3
Q2
12
WE
V
=Pin 16
GND=Pin 8
RE
11
LOGIC SYMBOL (IEEE/IEC)
SF01180
RAM 4X4
14
13
12
11
15
1
10
9
7
6
0
1
1A0
3
5
4
0
1
2A0
3
C4 [WRITE]
EN [READ]
2
3
1A, 4D
2A
WORD SELECT FUNCTION TABLE
WRITE MODE
READ MODE
OPERATING MODE
WB
WA
RB
RA
Word Selected
L
L
L
L
Word 0
L
H
L
H
Word 1
H
L
H
L
Word 2
H
H
H
H
Word 3
H = High voltage level
L = Low voltage level
READ MODE FUNCTION TABLE
INPUT
INTERNAL
LATCHES*
OUTPUT
OPERATING MODE
RE
Qn
L
L
L
Read
L
H
H
H
X
Z
Disabled
H = High voltage level
L = Low voltage level
X = Don’t care
Z = High impedance “off” state
*
= The selection of “internal latches” by Read Address
(RA and RB) are not constrained by WE or RE operation.
WRITE MODE FUNCTION TABLE
INPUTS
INTERNAL
LATCHES*
OPERATING MODE
WE
Dn
L
L
L
Write data
L
H
H
H
X
NC
Data latched
H = High voltage level
L = Low voltage level
NC= No change
X = Don’t care
*
= The write address (WA and WB) to the “internal latches”
must be stabled while WE is Low for conventional operation.
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