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參數(shù)資料
| 型號： | 74F393 |
| 廠商： | NXP Semiconductors N.V. |
| 元件分類： | 通用總線功能 |
| 英文描述： | Dual 4-bit binary ripple counter |
| 中文描述： | 雙4位二進制紋波計數(shù)器 |
| 文件頁數(shù)： | 5/8頁 |
| 文件大?。?/td> | 75K |
| 代理商： | 74F393 |
Philips Semiconductors
Product specification
74F393
Dual 4-bit binary ripple counter
1988 Nov 01
5
AC SETUP REQUIREMENTS
LIMITS
SYMBOL
PARAMETER
TEST
CONDITION
V
CC
= +5V
T
= +25
°
C
C
L
= 50pF, R
L
= 500
V
CC
= +5V
±
10%
T
amb
= 0
°
C to +70
°
C
C
L
L
= 500
UNIT
MIN
TYP
MAX
MIN
MAX
t
W
(H)
t
W
(L)
CPn Pulse width
High or Low
Waveform 1
4.5
3.5
5.0
4.0
ns
t
W
(H)
MR Pulse width
High
Waveform 2
3.5
4.5
ns
t
REC
Recovery time
MR to CPn
Waveform 2
2.5
3.0
ns
AC WAVEFORMS
For all waveforms, V
M
= 1.5V.
V
M
V
M
V
M
1/f
MAX
t
PHL
t
w
(L)
Qna, Qnb
t
w
(H)
V
M
CPn
t
PLH
SF00709
Waveform 1.
Clock Pulse Width, and Maximum Clock Frequency
Propagation Delay, Clock Input to Output,
V
M
V
M
V
M
t
rec
t
PHL
MR
CPn
Qna, Qnb
V
M
t
w
(H)
SF00708
Waveform 2.
Output Delay, and Master Reset to Clock Recovery Time
Master Reset Pulse Width, Master Reset to
TEST CIRCUIT AND WAVEFORMS
t
w
90%
V
M
10%
90%
V
M
10%
90%
V
M
10%
90%
V
M
10%
NEGATIVE
PULSE
POSITIVE
PULSE
t
w
AMP (V)
0V
0V
t
THL (
t
f
)
INPUT PULSE REQUIREMENTS
rep. rate
t
w
t
TLH
2.5ns
t
THL
2.5ns
1MHz
500ns
Input Pulse Definition
V
CC
family
74F
D.U.T.
PULSE
GENERATOR
R
L
C
L
R
T
V
IN
V
OUT
Test Circuit for Totem-Pole Outputs
DEFINITIONS:
R
L
=
Load resistor;
see AC ELECTRICAL CHARACTERISTICS for value.
Load capacitance includes jig and probe capacitance;
see AC ELECTRICAL CHARACTERISTICS for value.
Termination resistance should be equal to Z
OUT
of
pulse generators.
C
L
=
R
T
=
t
THL (
t
f
)
t
TLH (
t
r
)
t
TLH (
t
r
)
AMP (V)
amplitude
3.0V
1.5V
V
M
SF00006
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