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參數(shù)資料
| 型號(hào)： | 74F393 |
| 廠商： | NXP Semiconductors N.V. |
| 元件分類： | 通用總線功能 |
| 英文描述： | Dual 4-bit binary ripple counter |
| 中文描述： | 雙4位二進(jìn)制紋波計(jì)數(shù)器 |
| 文件頁數(shù)： | 4/8頁 |
| 文件大?。?/td> | 75K |
| 代理商： | 74F393 |
Philips Semiconductors
Product specification
74F393
Dual 4-bit binary ripple counter
1988 Nov 01
4
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.)
SYMBOL
PARAMETER
TEST CONDITIONS
1
LIMITS
TYP
2
UNIT
MIN
MAX
V
OH
High level output voltage
High-level output voltage
V
CC
= MIN, V
IL
= MAX
±
10%V
CC
2.5
V
V
IH
= MIN, I
OH
= MAX
±
5%V
CC
2.7
3.4
V
OL
Low level output voltage
Low-level output voltage
V
CC
= MIN, V
IL
= MAX
±
10%V
CC
0.30
0.50
V
V
IH
= MIN, I
OL
= MAX
±
5%V
CC
0.30
0.50
V
IK
I
I
Input clamp voltage
V
CC
= MIN, I
I
= I
IK
V
CC
= MAX, V
I
= 7.0V
–0.73
–1.2
V
Input current at maximum input voltage
100
μ
A
I
IH
High-level input current
V
CC
= MAX, V
I
= 2.7V
20
μ
A
I
IL
Low-level input current
V
CC
= MAX, V
I
= 0.5V
–0.6
mA
I
OS
Short-circuit output current
3
V
CC
= MAX
–60
–150
mA
I
CC
Supply current (total)
I
CCH
V
CC
= MAX
25
36
mA
I
CCL
42
58
mA
NOTES:
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.
2. All typical values are at V
= 5V, T
= 25
°
C.
3. Not more than one output should be shorted at a time. For testing I
, the use of high-speed test apparatus and/or sample-and-hold
techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting
of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any
sequence of parameter tests, I
OS
tests should be performed last.
AC ELECTRICAL CHARACTERISTICS
LIMITS
SYMBOL
PARAMETER
TEST
CONDITION
V
CC
= +5V
T
= +25
°
C
C
L
= 50pF, R
L
= 500
V
CC
= +5V
±
10%
T
amb
= 0
°
C to +70
°
C
C
L
L
= 500
UNIT
MIN
TYP
MAX
MIN
MAX
f
MAX
Maximum clock frequency
Waveform 1
100
130
100
MHz
t
PLH
t
PHL
Propagation delay
CPn to Q0a or Q0b
Waveform 1
3.5
5.0
5.5
7.0
8.0
10.0
3.5
5.0
9.0
10.5
ns
t
PLH
t
PHL
Propagation delay
CPn to Q1a, Q1b
Waveform 1
5.0
7.5
7.0
9.5
10.0
12.0
4.5
7.0
13.0
13.0
ns
t
PLH
t
PHL
Propagation delay
CPn to Q2a, Q2b
Waveform 1
8.0
9.5
10.0
11.5
13.0
14.5
7.0
9.0
15.0
15.5
ns
t
PLH
t
PHL
Propagation delay
CPn to Q3a, Q3b
Waveform 1
10.5
12.0
12.5
14.0
15.5
16.5
10.0
11.5
17.0
17.5
ns
t
PHL
Propagation delay
MR to Qna, Qnb
Waveform 2
4.0
6.0
9.0
4.0
9.0
ns
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