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參數(shù)資料
| 型號(hào)： | 74F382SC |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 通用總線功能 |
| 英文描述： | 4-Bit Arithmetic Logic Unit |
| 中文描述： | F/FAST SERIES, 4-BIT ARITHMETIC LOGIC UNIT, PDSO20 |
| 封裝： | 0.300 INCH, MS-013, SOIC-20 |
| 文件頁數(shù)： | 2/12頁 |
| 文件大?。?/td> | 121K |
| 代理商： | 74F382SC |
Philips Semiconductors
Product specification
74F382
Arithmetic logic unit
2
1990 Jul 12
853–0419 99966
FEATURES
Performs six arithmetic and logic functions
Selectable Low (clear) and High (preset) functions
Low-input loading minimizes drive requirements
Carry output for ripple expansion
Overflow output for Two’s Complement arithmetic
DESCRIPTION
The 74F382 performs three arithmetic and three logic operations on
two 4-bit words, A and B. Two additional Select (S0–S2) input codes
force the Function outputs Low or High. An overflow output is
provided for convenience in Two’s Complement arithmetic.
A carry output is provided for ripple expansion. For high-speed
expansion using a carry look-ahead generator, refer to the 74F381
data sheet.
Signals applied to the Select inputs, S0–S2, determine the mode of
operation, as indicated in the Function Select Table. An extensive
listing of input and output levels is shown in the Function Table. The
circuit performs the arithmetic functions for either active-HIgh or
active-Low operands, with output levels in the same convention. In
the subtract operating modes, it is necessary to force a carry (High
for active-HIgh operands, Low for active-Low operands) into the Cn
input of the least significant package. Ripple expansion is illustrated
in Figure 1. The overflow output OVR is the Exclusive-OR of Cn+3
and Cn+4; a High signal on OVR indicates overflow in Two’s
complement operation (See Table 2 for Two’s complement
arithmetic). Typical delays for Figure 1 are given in Table 1. When
the 74F382 is cascaded to handle word lengths longer than 4 bits,
only the most significant overflow (OVR) output is used.
PIN CONFIGURATION
20
19
18
17
16
15
14
7
6
5
4
3
2
1
13
8
V
CC
A1
B1
A0
B0
S0
S1
S2
F0
F1
GND
A2
B2
A3
B3
Cn
Cn+4
OVR
F3
F2
SF00935
12
9
11
10
TYPE
TYPICAL
PROPAGATION
DELAY
TYPICAL SUPPLY
CURRENT (TOTAL)
74F382
7.0ns
54mA
ORDERING INFORMATION
DESCRIPTION
COMMERCIAL RANGE
V
CC
= 5V
±
10%,
T
amb
= 0
°
C to +70
°
C
N74F382N
PKG DWG #
20-pin plastic DIP
SOT146-1
20-pin plastic SO
N74F382D
SOT163-1
INPUT AND OUTPUT LOADING AND FAN OUT TABLE
PINS
DESCRIPTION
74F (U.L.)
HIGH/LOW
1.0/4.0
1.0/4.0
1.0/1.0
1.0/5.0
50/33
50/33
50/33
LOAD VALUE
HIGH/LOW
20
μ
A/2.4mA
20
μ
A/2.4mA
20
μ
A/0.6mA
20
μ
A/3.0mA
1.0mA/20mA
1.0mA/20mA
1.0mA/20mA
A0 – A3
B0 – B3
S0 – S2
Cn
Cn+4
OVR
F0–F3
A operand inputs
B operand inputs
Function select inputs
Carry input
Carry output
Overflow output
Outputs
NOTE:
One (1.0) FAST unit load is defined as 20
μ
A in the High state and 0.6mA in the Low state.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 74F382SJ | 4-Bit Arithmetic Logic Unit |
| 74F382SCX | Fixed Point ALU |
| 74F382SJX | Fixed Point ALU |
| 74F385 | Quad serial adder/subtractor |
| 74F3893 | Quad Futurebus backplane transceiver(四通道預(yù)置總線底板收發(fā)器) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 74F382SCX | 功能描述:算數(shù)邏輯單元 - ALU 4-Bit Arith Log Unit RoHS:否 制造商:ON Semiconductor 高電平輸出電流: 低電平輸出電流: 傳播延遲時(shí)間: 電源電壓-最大:18 V 電源電壓-最小:3 V 封裝 / 箱體:SOIC-16 Wide 最大工作溫度:+ 125 C 封裝:Reel |
| 74F382SJ | 功能描述:算數(shù)邏輯單元 - ALU 4-Bit Arith Log Unit RoHS:否 制造商:ON Semiconductor 高電平輸出電流: 低電平輸出電流: 傳播延遲時(shí)間: 電源電壓-最大:18 V 電源電壓-最小:3 V 封裝 / 箱體:SOIC-16 Wide 最大工作溫度:+ 125 C 封裝:Reel |
| 74F382SJX | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:Fixed Point ALU |
| 74F385 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Quad serial adder/subtractor |
| 74F3893 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Quad futurebus backplane transceiver |
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