- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄360429 > 74F219A (NXP Semiconductors N.V.) 64-bit TTL bipolar RAM, non-inverting(3-State)(64位TTL雙極性RAM，同向（三態(tài)）) PDF資料下載
參數(shù)資料
| 型號： | 74F219A |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | 64-bit TTL bipolar RAM, non-inverting(3-State)(64位TTL雙極性RAM，同向（三態(tài)）) |
| 中文描述： | 64位TTL雙極內(nèi)存，非反相（3態(tài)）（64位的TTL雙極性內(nèi)存，同向（三態(tài)）） |
| 文件頁數(shù)： | 2/12頁 |
| 文件大?。?/td> | 91K |
| 代理商： | 74F219A |
Philips Semiconductors
Product specification
74F219A
64-bit TTL bipolar RAM, non-inverting (3-State)
2
1996 Jan 05
853-1308 16196
FEATURES
High speed performance
Replaces 74F219
Address access time: 8ns max vs 28ns for 74F219
Power dissipation: 4.3mW/bit typ
Schottky clamp TTL
One chip enable
Non–Inverting outputs (for inverting outputs see 74F189A)
3–state outputs
74F219A in 150 mil wide SO is preferred options for new designs
C3F219A in 300 mil wide SOL replaces 74F219 in existing
designs
DESCRIPTION
The 74F219A is a high speed, 64–bit RAM organized as a 16–word
by 4–bit array. Address inputs are buffered to minimize loading and
are fully decoded on chip. The outputs are in high impedance state
whenever the chip enable (CE) is high. The outputs are active only
in the READ mode (WE = high) and the output data is the
complement of the stored data.
APPLICATIONS
Scratch pad memory
Buffer memory
Push down stacks
Control store
PIN CONFIGURATION
16
15
14
13
12
11
10
7
6
5
4
3
2
1
D0
D3
D2
Q2
Q3
A1
A2
A0
CE
Q1
WE
D1
GND
9
8
Q0
V
CC
A3
SF00307
TYPE
TYPICAL ACCESS TIME
TYPICAL SUPPLY CURRENT(TOTAL)
74F219A
5.0ns
55mA
ORDERING INFORMATION
ORDER CODE
DESCRIPTION
COMMERCIAL RANGE
V
CC
= 5V
±
10%, T
amb
= 0
°
C to +70
°
C
N74F219AN
DRAWING NUMBER
16-pin plastic Dual In-line Package
SOT38-4
16-pin plastic Small Outline (150mil)
N74F219AD
SOT109-1
16-pin plastic Small Outline Large (300mil)
C3F219AD
SOT162–1
INPUT AND OUTPUT LOADING AND FAN OUT TABLE
PINS
DESCRIPTION
74F (U.L.)
HIGH/LOW
LOAD VALUE
HIGH/LOW
D0 – D3
Data inputs
1.0/1.0
20
μ
A
/
0.6mA
20
μ
A
/
0.6mA
20
μ
A/1.2mA
20
μ
A/1.2mA
A0 – A3
Address inputs
1.0/1.0
CE
Chip enable input (active low)
1.0/2.0
WE
Write enable input (active low)
1.0/2.0
Q0 – Q3
Data outputs
150/40
3mA/24mA
NOTE:
One (1.0) FAST unit load is defined as: 20
μ
A in the high state and 0.6mA in the low state.
相關PDF資料 |
PDF描述 |
|---|---|
| 74F219SCX | x4 SRAM |
| 74F219SJX | x4 SRAM |
| 74F2240SJ | Dual 4-Bit Inverting Buffer/Driver |
| 74F2241DC | Dual 4-Bit Non-Inverting Buffer/Driver |
| 54F2244DMX | Dual 4-Bit Non-Inverting Buffer/Driver |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| 74F219PC | 功能描述:RAM其它 64-Bit Ran Acces Mem RoHS:否 制造商:Freescale Semiconductor 封裝:Tray |
| 74F219PC WAF | 制造商:Fairchild Semiconductor Corporation 功能描述: |
| 74F219SC | 功能描述:RAM其它 64-Bit Ran Acces Mem RoHS:否 制造商:Freescale Semiconductor 封裝:Tray |
| 74F219SCX | 功能描述:RAM其它 64-Bit Ran Acces Mem RoHS:否 制造商:Freescale Semiconductor 封裝:Tray |
| 74F219SJ | 功能描述:RAM其它 64-Bit Ran Acces Mem RoHS:否 制造商:Freescale Semiconductor 封裝:Tray |
發(fā)布緊急采購，3分鐘左右您將得到回復。