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參數(shù)資料
| 型號： | 74F132SCX |
| 英文描述： | Quad 2-input NAND Gate |
| 中文描述： | 四2輸入與非門 |
| 文件頁數(shù)： | 1/5頁 |
| 文件大小： | 65K |
| 代理商： | 74F132SCX |
2000 Fairchild Semiconductor Corporation
DS009477
www.fairchildsemi.com
April 1988
Revised September 2000
7
74F132
Quad 2-Input NAND Schmitt Trigger
General Description
The F132 contains four 2-input NAND gates which accept
standard TTL input signals and provide standard TTL out-
put levels. They are capable of transforming slowly chang-
ing input signals into sharply defined, jitter-free output
signals. In addition, they have a greater noise margin than
conventional NAND gates.
Each circuit contains a 2-input Schmitt Trigger followed by
level shifting circuitry and a standard FAST
output struc-
ture. The Schmitt Trigger uses positive feedback to effec-
tively speed-up slow input transitions, and provide different
input threshold voltages for positive and negative-going
transitions. This hysteresis between the positive-going and
negative-going input threshold (typically 800 mV) is deter-
mined by resistor ratios and is essentially insensitive to
temperature and supply voltage variations.
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
IEEE/IEC
Unit Loading/Fan Out
Connection Diagram
Function Table
H
=
HIGH Voltage Level
L
=
LOW Voltage Level
FAST
is a registered trademark of Fairchild Semiconductor Corporation
Order Number
74F132SC
74F132SJ
74F132PC
Package Number
M14A
M14D
N14A
Package Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Pin Names Description
U.L.
Input I
IH
/I
IL
Output I
OH
/I
OL
20
μ
A/
0.6 mA
1 mA/20 mA
HIGH/LOW
A
n
, B
n
O
n
Inputs
Outputs
1.0/1.0
50/33.3
Inputs
Outputs
A
L
L
H
H
B
L
H
L
H
O
H
H
H
L
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 74F132SJX | Quad 2-input NAND Gate |
| 74F138SCX | 3-To-8-Line Demultiplexer |
| 74F138SJX | 3-To-8-Line Demultiplexer |
| 74F132 | Quad 2-input NAND Schmitt trigger(四2輸入與非門施密特觸發(fā)器) |
| 74F133 | 13-input NAND gate(13輸入與非門) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 74F132SJ | 功能描述:邏輯門 Qd 2-Inp NAND Sc Tri RoHS:否 制造商:Texas Instruments 產(chǎn)品:OR 邏輯系列:LVC 柵極數(shù)量:2 線路數(shù)量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
| 74F132SJ_Q | 功能描述:邏輯門 Qd 2-Inp NAND Sc Tri RoHS:否 制造商:Texas Instruments 產(chǎn)品:OR 邏輯系列:LVC 柵極數(shù)量:2 線路數(shù)量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
| 74F132SJX | 功能描述:邏輯門 Qd 2-Inp NAND Sc Tri RoHS:否 制造商:Texas Instruments 產(chǎn)品:OR 邏輯系列:LVC 柵極數(shù)量:2 線路數(shù)量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
| 74F133 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:13.input NAND Gate |
| 74F133D | 制造商:NXP Semiconductors 功能描述: |
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