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參數(shù)資料
| 型號： | 74ALVT16841 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | 2.5V/3.3V ALVT 20-bit bus interface latch(3-State)(2.5V/3.3V ALVT 20位總線接口鎖存器（三態(tài)）) |
| 中文描述： | 2.5V/3.3V的ALVT 20位總線接口鎖存器（3態(tài)）（2.5V/3.3V的ALVT 20位總線接口鎖存器（三態(tài)）） |
| 文件頁數(shù)： | 9/14頁 |
| 文件大?。?/td> | 96K |
| 代理商： | 74ALVT16841 |
Philips Semiconductors
Product specification
74ALVT16841
2.5V/3.3V 20-bit bus interface latch (3-State)
1998 Feb 13
9
AC CHARACTERISTICS (2.5V
GND = 0V; t
R
= t
F
= 2.5ns; C
L
= 50pF; R
L
= 500
; T
amb
= –40
°
C to +85
°
C.
0.2V RANGE)
LIMITS
SYMBOL
PARAMETER
WAVEFORM
T
amb
= -40 to +85
o
C
V
CC
= +2.5V
±
0.2V
TYP
UNIT
MIN
MAX
t
PLH
t
PHL
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
NOTE:
1. All typical values are at V
CC
= 3.3V and T
amb
= 25
°
C.
Propagation delay
nDx to nQx
2
0.5
0.5
1.8
2.1
3.0
3.6
ns
Propagation delay
nLE to nQx
1
1.0
2.0
2.7
4.2
4.3
6.5
ns
Output enable time
to High and Low level
4
5
1.5
0.5
3.0
1.8
4.0
3.2
ns
Output disable time
from High and Low level
4
5
1.5
1.0
3.1
2.4
4.5
3.8
ns
AC SETUP REQUIREMENTS (2.5V
GND = 0V, t
R
= t
F
= 2.5ns, C
L
= 50pF, R
L
= 500
0.2V RANGE)
LIMITS
SYMBOL
PARAMETER
WAVEFORM
T
amb
= -40 to +85
o
C
V
CC
= +2.5V
±
0.2V
Min
UNIT
Typ
t
s
(H)
t
s
(L)
t
h
(H)
t
h
(L)
t
w
(H)
Setup time, High or Low
nDx to nLE
3
0.5
1.5
0
0.2
ns
Hold time, High or Low
nDx to nLE
3
1.8
2.0
0
0.8
ns
nLE pulse width High
1
1.5
ns
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| 74ALVT16841DL | 2.5V/3.3V ALVT 20-bit bus interface latch 3-State |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 74ALVT16841DGG | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:2.5V/3.3V ALVT 20-bit bus interface latch 3-State |
| 74ALVT16841DL | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:2.5V/3.3V ALVT 20-bit bus interface latch 3-State |
| 74ALVT16841DL-T | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:10-Bit D-Type Latch |
| 74ALVT16899 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:2.5V/3.3V 18-bit latched transceiver with 16-bit parity generator/checker 3-State |
| 74ALVT16899DGG | 制造商:NXP Semiconductors 功能描述: |
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