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參數(shù)資料
| 型號： | 74ALVT16841 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | 2.5V/3.3V ALVT 20-bit bus interface latch(3-State)(2.5V/3.3V ALVT 20位總線接口鎖存器（三態(tài)）) |
| 中文描述： | 2.5V/3.3V的ALVT 20位總線接口鎖存器（3態(tài)）（2.5V/3.3V的ALVT 20位總線接口鎖存器（三態(tài)）） |
| 文件頁數(shù)： | 8/14頁 |
| 文件大?。?/td> | 96K |
| 代理商： | 74ALVT16841 |
Philips Semiconductors
Product specification
74ALVT16841
2.5V/3.3V 20-bit bus interface latch (3-State)
1998 Feb 13
8
DC ELECTRICAL CHARACTERISTICS (2.5V
0.2V RANGE)
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
Temp = -40
°
C to +85
°
C
UNIT
MIN
TYP
1
MAX
V
IK
Input clamp voltage
V
CC
= 2.3V; I
IK
= –18mA
–0.85
–1.2
V
V
OH
High-level output voltage
High-level out ut voltage
V
CC
= 2.3 to 3.6V; I
OH
= –100
μ
A
V
CC
–0.2
V
CC
V
V
CC
= 2.3V; I
OH
= –8mA
1.8
2.1
V
CC
= 2.3V; I
OL
= 100
μ
A
0.07
0.2
V
OL
Low-level output voltage
V
CC
= 2.3V; I
OL
= 24mA
V
CC
= 2.3V; I
OL
= 8mA
V
CC
= 2.7V; I
O
= 1mA; V
I
= V
CC
or GND
V
CC
= 2.7V; V
I
= V
CC
or GND
V
CC
= 0 or 2.7V; V
I
= 5.5V
V
CC
= 2.7V; V
I
= V
CC
V
CC
= 2.7V; V
I
= 0
V
CC
= 0V; V
I
or V
O
= 0 to 4.5V
V
CC
= 2.3V; V
I
= 0.7V
V
CC
= 2.3V; V
I
= 1.7V
0.3
0.5
V
0.4
V
RST
Power-up output low voltage
7
0.55
±
1
10
1
-5
100
V
Control pins
0.1
0.1
0.1
0.1
0.1
90
–10
I
I
Input leakage current
In ut leakage current
μ
A
Data pins
Data ins
4
I
OFF
Off current
Bus Hold current
Data inputs
6
μ
A
I
HOLD
μ
A
I
EX
Current into an output in the
High state when V
O
> V
CC
V
O
= 5.5V; V
CC
= 2.3V
10
125
μ
A
I
PU/PD
Power up/down 3-State output
current
3
V
CC
≤
1.2V; V
O
= 0.5V to V
CC
; V
I
= GND or V
CC
;
OE/OE = Don’t care
1
100
μ
A
I
OZH
3-State output High current
V
CC
= 2.7V; V
O
= 2.3V; V
I
= V
IL
or V
IH
0.5
5
μ
A
I
OZL
3-State output Low current
V
CC
= 2.7V; V
O
= 0.5V; V
I
= V
IL
or V
IH
0.5
–5
μ
A
I
CCH
V
CC
= 2.7V; Outputs High, V
I
= GND or V
CC,
I
O =
0
0.04
0.1
I
CCL
Quiescent supply current
V
CC
= 2.7V; Outputs Low, V
I
= GND or V
CC,
I
O =
0
2.3
4.5
mA
I
CCZ
V
CC
= 2.7V; Outputs Disabled; V
I
= GND or V
CC,
I
O =
0
5
0.04
0.1
I
CC
Additional supply current per
input pin
2
V
= 2.3V to 2.7V; One input at V
CC
–0.6V,
Other inputs at V
CC
or GND
0.04
0.4
mA
NOTES:
1. All typical values are at V
CC
= 2.5V and T
amb
= 25
°
C.
2. This is the increase in supply current for each input at the specified voltage level other than V
CC
or GND
3. This parameter is valid for any V
CC
between 0V and 1.2V with a transition time of up to 10msec. From V
CC
= 1.2V to V
CC
= 2.5V
±
0.2V a
transition time of 100
μ
sec is permitted. This parameter is valid for T
amb
= 25
°
C only.
4. Unused pins at V
or GND.
5. I
is measured with outputs pulled up to V
CC
or pulled down to ground.
6. Not guaranteed.
7. For valid test results, data must not be loaded into the flip-flops (or latches) after applying power.
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| 74ALVT16841DGG | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:2.5V/3.3V ALVT 20-bit bus interface latch 3-State |
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| 74ALVT16899 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:2.5V/3.3V 18-bit latched transceiver with 16-bit parity generator/checker 3-State |
| 74ALVT16899DGG | 制造商:NXP Semiconductors 功能描述: |
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