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參數(shù)資料
| 型號： | 74ALVC373 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Octal D-type transparent latch 3-state |
| 中文描述： | 八路D型透明鎖存器三態(tài) |
| 文件頁數(shù)： | 2/20頁 |
| 文件大?。?/td> | 97K |
| 代理商： | 74ALVC373 |
2002 Feb 26
2
Philips Semiconductors
Product specification
Octal D-type transparent latch; 3-state
74ALVC373
FEATURES
Wide supply voltage range from 1.65 to 3.6 V
Complies with JEDEC standard:
JESD8-7 (1.65 to 1.95 V)
JESD8-5 (2.3 to 2.7 V)
JESD8B/JESD36 (2.7 to 3.6 V).
3.6 V tolerant inputs/outputs
CMOS LOW power consumption
Direct interface with TTL levels (2.7 to 3.6 V)
Power-down mode
Latch-up performance exceeds
≤
250 mA
ESD protection:
2000 V Human Body Model (JESD22-A114-A)
200 V Machine Model (JESD22-A115-A).
DESCRIPTION
The 74ALVC373 is a high-performance, low-power,
low-voltage, Si-gate CMOS device and superior to most
advanced CMOS compatible TTL families.
The 74ALVC373 is an octal D-type transparent latch
featuring separate D-type inputs for each latch and 3-state
outputs for bus oriented applications. A latch enable (LE)
input and an output enable (OE) input are common to all
internal latches.
The 74ALVC373 consists of eight D-type transparent
latches with 3-state true outputs. When LE is HIGH, data
at the D
n
inputs enters the latches. In this condition the
latchesaretransparent,i.e.alatchoutputwillchangestate
each time its corresponding D-input changes.
When LE is LOW the latches store the information that
was present at the D-inputs a set-up time preceding the
HIGH-to-LOW transition of LE. When OE is LOW, the
contents of the 8 latches are available at the outputs.
When OE is HIGH, the outputs go to the high-impedance
OFF-state. Operation of the OE input does not affect the
state of the latches.
The ‘373’ is functionally identical to the ‘573’, but the ‘573’
have a different pin arrangement.
QUICK REFERENCE DATA
GND = 0 V; T
amb
= 25
°
C.
Notes
1.
C
PD
is used to determine the dynamic power dissipation (P
D
in
μ
W).
P
D
= C
PD
×
V
CC2
×
f
i
+ (C
L
×
V
CC2
×
f
o
) where:
f
i
= input frequency in MHz;
f
o
= output frequency in MHz;
C
L
= output load capacitance in pF;
V
CC
= supply voltage in Volts.
The condition is V
I
= GND to V
CC
and the latch is in transparent mode.
2.
SYMBOL
PARAMETER
CONDITIONS
TYP.
UNIT
t
PHL
/t
PLH
propagation delay inputs D
n
to output Q
n
V
CC
= 1.8 V; C
L
= 30 pF; R
L
= 1 k
V
CC
= 2.5 V; C
L
= 30 pF; R
L
= 500
V
CC
= 2.7 V; C
L
= 50 pF; R
L
= 500
V
CC
= 3.3 V; C
L
= 50 pF; R
L
= 500
3.0
2.3
2.4
2.2
3.5
ns
ns
ns
ns
pF
C
I
C
PD
input capacitance
power dissipation capacitance per buffer
V
CC
= 3.3 V; notes 1 and 2
outputs enable
outputs disabled
35
14
pF
pF
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 74ALVC374 | Quadruple Bus Buffer Gates With 3-State Outputs 14-PDIP -40 to 85 |
| 74ALVC541 | Octal buffer/line driver; 3-state |
| 74ALVC573 | Octal D-type transparent latch 3-state |
| 74ALVC574 | Octal D-type flip-flop positive edge-trigger 3-state |
| 74ALVC74 | Dual D-type flip-flop with set and reset; positive-edge trigger |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 74ALVC373BQ | 制造商:NXP Semiconductors 功能描述:IC LATCH D TYPE OCTAL DHVQFN20 制造商:NXP Semiconductors 功能描述:IC, LATCH, D TYPE, OCTAL, DHVQFN20 制造商:NXP Semiconductors 功能描述:IC, LATCH, D TYPE, OCTAL, DHVQFN20, Latch Type:D Type Transparent, Output Curren |
| 74ALVC373BQ,115 | 功能描述:閉鎖 3.3V OCTAL D-TYPE RoHS:否 制造商:Micrel 電路數(shù)量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數(shù)量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel |
| 74ALVC373BQ-G | 功能描述:閉鎖 3.3V OCTAL D-TYPE TRANSP LATCH RoHS:否 制造商:Micrel 電路數(shù)量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數(shù)量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel |
| 74ALVC373D | 功能描述:閉鎖 3.3V OCT D-TYPE TRANSP LTCH 3S RoHS:否 制造商:Micrel 電路數(shù)量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數(shù)量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel |
| 74ALVC373D,112 | 功能描述:閉鎖 3.3V OCT D-TYPE RoHS:否 制造商:Micrel 電路數(shù)量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數(shù)量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel |
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