參數(shù)資料
型號: 74ALVC162374TX
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類: 通用總線功能
英文描述: 16-Bit D-Type Flip-Flop
中文描述: ALVC/VCX/A SERIES, DUAL 8-BIT DRIVER, TRUE OUTPUT, PDSO48
封裝: 6.10 MM, MO-153, TSSOP-48
文件頁數(shù): 2/6頁
文件大?。?/td> 95K
代理商: 74ALVC162374TX
www.fairchildsemi.com
2
7
Connection Diagram
Truth Tables
H
L
X
Z
O
0
=
Previous O
0
before HIGH-to-LOW of CP
=
HIGH Voltage Level
=
LOW Voltage Level
=
Immaterial (HIGH or LOW, inputs may not float)
=
High Impedance
Functional Description
The 74ALVC162374 consists of sixteen edge-triggered flip-
flops with individual D-type inputs and 3-STATE true out-
puts. The device is byte controlled with each byte function-
ing identically, but independent of the other. The control
pins can be shorted together to obtain full 16-bit operation.
Each clock has a buffered clock and buffered Output
Enable common to all flip-flops within that byte. The
description which follows applies to each byte. Each flip-
flop will store the state of their individual I inputs that meet
the setup and hold time requirements on the LOW-to-HIGH
Clock (CP
n
) transition. With the Output Enable (OE
n
) LOW,
the contents of the flip-flops are available at the outputs.
When OE
n
is HIGH, the outputs go to the high impedance
state. Operations of the OE
n
input does not affect the state
of the flip-flops.
Logic Diagram
Byte 1 (0:7)
Byte 2 (8:15)
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
Inputs
Outputs
CP
1
OE
1
I
0
–I
7
O
0
–O
7
L
H
H
L
L
L
L
L
X
O
0
Z
X
H
X
Inputs
Outputs
CP
2
OE
2
I
8
–I
15
O
8
–O
15
L
H
H
L
L
L
L
L
X
O
0
Z
X
H
X
相關(guān)PDF資料
PDF描述
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