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參數(shù)資料
| 型號： | 74ACT258SJX |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 通用總線功能 |
| 英文描述： | Low-Power µP Reset Circuits in 3-Pin SC70/SOT23 |
| 中文描述： | ACT SERIES, QUAD 2 LINE TO 1 LINE MULTIPLEXER, INVERTED OUTPUT, PDSO16 |
| 封裝： | 5.30 MM, EIAJ TYPE2, SOP-16 |
| 文件頁數(shù)： | 1/8頁 |
| 文件大?。?/td> | 90K |
| 代理商： | 74ACT258SJX |
1999 Fairchild Semiconductor Corporation
DS009950
www.fairchildsemi.com
November 1988
Revised November 1999
7
74ACT258
Quad 2-Input Multiplexer with 3-STATE Outputs
General Description
The ACT258 is a quad 2-input multiplexer with 3-STATE
outputs. Four bits of data from two sources can be selected
using a common data select input. The four outputs
present the selected data in the complement (inverted)
form. The outputs may be switched to a high impedance
state with a HIGH on the common Output Enable (OE)
input, allowing the outputs to interface directly with bus-ori-
ented systems.
Features
I
I
CC
and I
OZ
reduced by 50%
I
Multiplexer expansion by tying outputs together
I
Inverting 3-STATE outputs
I
Outputs source/sink 24 mA
I
TTL-compatible inputs
Ordering Code:
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbols
IEEE/IEC
Connection Diagram
Pin Descriptions
FACT
is a trademark of Fairchild Semiconductor Corporation.
Order Number
74ACT258SC
74ACT258SJ
74ACT258MTC
74ACT258PC
Package Number
M16A
M16D
MTC16
N16E
Package Description
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150
”
Narrow Body
16-Lead Small Outline Package (SOP), EIAJ TYPE 11, 5.3mm Wide
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300
”
Wide
Pin Names
Description
S
Common Data Select Input
OE
3-STATE Output Enable Input
I
0a
–
I
0d
I
1a
–
I
1d
Z
a
–
Z
d
Data Inputs from Source 0
Data Inputs from Source 1
3-STATE Inverting Data Outputs
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