參數(shù)資料
型號(hào)： 74ABT544N
廠商： NXP SEMICONDUCTORS
元件分類： 通用總線功能
英文描述： Synchronous 4-Bit Binary Counter 16-SOIC 0 to 70
中文描述： ABT SERIES, 8-BIT REGISTERED TRANSCEIVER, INVERTED OUTPUT, PDIP24
封裝： 0.300 INCH, PLASTIC, SOT-222-1, DIP-24
文件頁數(shù)： 5/8頁
文件大?。?/td> 97K
代理商： 74ABT544N
Philips Semiconductors Advanced BiCMOS Products
Product specification
74ABT544
Octal latched transceiver with dual enable,
inverting (3-State)
June 1, 1993
5
DC ELECTRICAL CHARACTERISTICS
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
T
amb
= +25
°
C
T
amb
= –40
°
C
to +85
°
C
UNIT
Min
Typ
Max
Min
Max
V
IK
Input clamp voltage
V
CC
= 4.5V; I
IK
= –18mA
–0.9
–1.2
–1.2
V
V
CC
= 4.5V; I
OH
= –3mA; V
I
= V
IL
or V
IH
2.5
3.2
2.5
V
V
OH
High-level output voltage
V
CC
= 5.0V; I
OH
= –3mA; V
I
= V
IL
or V
IH
3.0
3.7
3.0
V
V
CC
= 4.5V; I
OH
= –32mA; V
I
= V
IL
or V
IH
2.0
2.3
2.0
V
V
OL
Low-level output voltage
V
CC
= 4.5V; I
OL
= 64mA; V
I
= V
IL
or V
IH
0.42
0.55
0.55
V
V
RST
Power-up output low
voltage
3
V
CC
= 5.5V; I
O
= 1mA; V
I
= GND or V
CC
0.13
0.55
0.55
V
I
I
Input leakage
Control pins
V
CC
= 5.5V; V
I
= GND or 5.5V
V
CC
= 5.5V; V
I
= GND or 5.5V
V
CC
= 0.0V; V
I
or V
O
≤
4.5V
±
0.01
±
1.0
±
1.0
μ
A
current
Data pins
±
5
±
5.0
±
100
±
100
±
100
±
100
μ
A
μ
A
I
OFF
Power-off leakage current
I
PU/PD
Power-up/down 3-State
output current
4
V
CC
= 2.1V; V
O
= 0.5V; V
I
= GND or V
CC
;
V
OE
= Don’t care
±
5.0
±
50
±
50
μ
A
I
IH
+ I
OZH
3-State output High current
V
CC
= 5.5V; V
O
= 2.7V; V
I
= V
IL
or V
IH
5.0
50
50
μ
A
I
IL
+ I
OZL
3-State output Low current
V
CC
= 5.5V; V
O
= 0.5V; V
I
= V
IL
or V
IH
–5.0
–50
–50
μ
A
I
CEX
Output high leakage current
V
CC
= 5.5V; V
O
= 5.5V; V
I
= GND or V
CC
5.0
50
50
μ
A
I
O
Output current
1
V
CC
= 5.5V; V
O
= 2.5V
–50
–65
–180
–50
–180
mA
I
CCH
V
CC
= 5.5V; Outputs High, V
I
= GND or V
CC
110
250
250
μ
A
I
CCL
Quiescent supply current
V
CC
= 5.5V; Outputs Low, V
I
= GND or V
CC
20
30
30
mA
I
CCZ
V
CC
= 5.5V; Outputs 3–State;
V
I
= GND or V
CC
110
250
250
μ
A
I
CC
Additional supply current per
input pin
2
V
= 5.5V; one input at 3.4V,
other inputs at V
CC
or GND; V
CC
= 5.5V
0.3
1.5
1.5
mA
NOTES:
1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
2. This is the increase in supply current for each input at 3.4V.
3. For valid test results, data must not be loaded into the flip–flops (or latches) after applying the power.
4. This parameter is valid for any V
between 0V and 2.1V, with a transition of 10msec. From V
CC
= 2.1V to V
CC
= 5V
±
10%, a transition
time of up to 100
μ
sec is permitted.
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74ABT544PW,118 功能描述:總線收發(fā)器 OCTAL LATCHED XCVR RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel
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