參數(shù)資料
型號(hào): 74ABT161543DGG
廠商: NXP SEMICONDUCTORS
元件分類: 通用總線功能
英文描述: 16-bit latched transceiver with dual enable and master reset 3-State
中文描述: ABT SERIES, DUAL 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO56
封裝: PLASTIC, TSSOP2-56
文件頁(yè)數(shù): 5/12頁(yè)
文件大?。?/td> 85K
代理商: 74ABT161543DGG
Philips Semiconductors
Product specification
74ABT161543
74ABTH161543
16-bit latched transceiver with dual enable
and master reset (3-State)
1998 Feb 27
5
LOGIC DIAGRAM
D
LE
Q
D
LE
Q
DETAIL A
nB0
nB1
nA1
nB2
nA2
nB3
nA3
nB4
nA4
nB5
nA5
nB6
nA6
nB7
nA7
DETAIL A X 7
nOEAB
nEAB
nLEAB
nOEBA
nEBA
nLEBA
nA0
SH00062
R
MRab
MRba
R
ABSOLUTE MAXIMUM RATINGS
1, 2
SYMBOL
PARAMETER
CONDITIONS
RATING
UNIT
V
CC
DC supply voltage
–0.5 to +7.0
V
I
IK
DC input diode current
V
I
< 0
–18
mA
V
I
DC input voltage
3
–1.2 to +7.0
V
I
OK
DC output diode current
V
O
< 0
–50
mA
V
OUT
DC output voltage
3
output in Off or High state
–0.5 to +5.5
V
I
OUT
DC output current
output in Low state
128
mA
output in High state
–64
mA
T
stg
Storage temperature range
–65 to 150
°
C
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150
°
C.
3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
相關(guān)PDF資料
PDF描述
74ABTH161543DGG 16-bit latched transceiver with dual enable and master reset 3-State
74ABT161543 16-bit latched transceiver with dual enable and master reset 3-State
74ABT161543DL 16-bit latched transceiver with dual enable and master reset 3-State
74ABTH161543 16-Bit Latched Transceiver With Dual Enable and Master Reset (3-State)(帶雙路使能和主線復(fù)位的16位鎖存的收發(fā)器)
74ABTH161543DL 16-bit latched transceiver with dual enable and master reset 3-State
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