參數(shù)資料
型號(hào)： 72235LB25JGI
廠商： INTEGRATED DEVICE TECHNOLOGY INC
元件分類(lèi)： FIFO
英文描述： 2K X 18 OTHER FIFO, 15 ns, PQCC68
封裝： GREEN, PLASTIC, LCC-68
文件頁(yè)數(shù)： 6/16頁(yè)
文件大小： 178K
代理商： 72235LB25JGI
14
IDT72205LB/72215LB/72225LB/72235LB/72245LB CMOS SyncFIFOTM
256 x 18, 512 x 18, 1,024 x 18, 2,048 x 18 and 4,096 x 18
COMMERCIALANDINDUSTRIAL
TEMPERATURERANGES
OCTOBER 22, 2008
OPERATINGCONFIGURATIONS
SINGLE DEVICE CONFIGURATION
AsingleIDT72205LB/72215LB/72225LB/72235LB/72245LBmaybeused
when the application requirements are for 256/512/1,024/2,048/4,096 words
or less. These FIFOs are in a single Device Configuration when the First Load
(
FL), Write Expansion In (WXI) and Read Expansion In (RXI) control inputs
are grounded (Figure 19).
Figure 19. Block Diagram of Single 256 x 18, 512 x 18, 1,024 x 18, 2,048 x 18, 4,096 x 18 Synchronous FIFO
NOTE:
1. Do not connect any output control signals directly together.
Figure 20. Block Diagram of 256 x 36, 512 x 36, 1,024 x 36, 2,048 x 36, 4,096 x 36
Synchronous FIFO Memory Used in a Width Expansion Configuration
WIDTH EXPANSION CONFIGURATION
Word width may be increased simply by connecting together the control
signals of multiple devices. Status flags can be detected from any one device.
TheexceptionsaretheEmptyFlagandFullFlag. Becauseofvariationsinskew
between RCLK and WCLK, it is possible for flag assertion and deassertion to
vary by one cycle between FIFOs. To avoid problems the user must create
composite flags by ANDing the Empty Flags of every FIFO, and separately
ANDing all Full Flags. Figure 20 demonstrates a 36-word width by using two
IDT72205LB/72215LB/72225LB/72235LB/72245LBs. Any word width can
be attained by adding additional IDT72205LB/72215LB/72225LB/72235LB/
72245LBs. Please see the Application Note AN-83.
WRITE CLOCK (WCLK)
WRITE ENABLE (
)
READ CLOCK (RCLK)
READ ENABLE (
)
LOAD (
)
OUTPUT ENABLE (
)
DATA IN (D)
DATA OUT (Q)
FULL FLAG (
)
PROGRAMMABLE (
)
HALF FULL FLAG (
)
EMPTY FLAG (
)
PROGRAMMABLE (
)
RESET (
)
72205LB
72215LB
72225LB
72235LB
72245LB
72205LB
72215LB
72225LB
72235LB
72245LB
RESET (
)
36
18
2766 drw 22
FIRST LOAD (
)
READ EXPANSION IN (
)
WRITE EXPANSION IN (
)
WRITE CLOCK (WCLK)
WRITE ENABLE (
)
READ CLOCK (RCLK)
READ ENABLE (
)
LOAD (
)
OUTPUT ENABLE (
)
DATA IN (D0 - D17)
DATA OUT (Q0 - Q17)
FULL FLAG (
)
PROGRAMMABLE (
)
HALF-FULL FLAG (
)
EMPTY FLAG (
)
PROGRAMMABLE (
)
RESET (
)
IDT
72205LB
72215LB
72225LB
72235LB
72245LB
2766 drw 21
FIRST LOAD (
)
READ EXPANSION IN (
)
WRITE EXPANSION IN (
)
相關(guān)PDF資料
PDF描述
72225LB25TFG 1K X 18 OTHER FIFO, 15 ns, PQFP64
723-611/019-000 15 A, MODULAR TERMINAL BLOCK, 1 ROW, 1 DECK
72346-001LF 20 CONTACT(S), FEMALE, STRAIGHT TELECOM AND DATACOM CONNECTOR, SOLDER, RECEPTACLE
72346-001 20 CONTACT(S), FEMALE, STRAIGHT TELECOM AND DATACOM CONNECTOR, SOLDER, RECEPTACLE
72346-002LF 20 CONTACT(S), FEMALE, STRAIGHT TELECOM AND DATACOM CONNECTOR, SOLDER, RECEPTACLE
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
72235LB25JI 制造商:Integrated Device Technology Inc 功能描述:FIFO Mem Sync Dual Depth/Width Uni-Dir 2K x 18 68-Pin PLCC 制造商:Integrated Device Technology Inc 功能描述:FIFO SYNC DUAL DEPTH/WIDTH UNI-DIR 2KX18 68PLCC - Rail/Tube
72235LB25JI8 制造商:Integrated Device Technology Inc 功能描述:FIFO Mem Sync Dual Depth/Width Uni-Dir 2K x 18 68-Pin PLCC T/R 制造商:Integrated Device Technology Inc 功能描述:FIFO SYNC DUAL DEPTH/WIDTH UNI-DIR 2KX18 68PLCC - Tape and Reel
72235LB25PF 功能描述:先進(jìn)先出 RoHS:否 制造商:IDT 電路數(shù)量: 數(shù)據(jù)總線(xiàn)寬度:18 bit 總線(xiàn)定向:Unidirectional 存儲(chǔ)容量:4 Mbit 定時(shí)類(lèi)型:Synchronous 組織:256 K x 18 最大時(shí)鐘頻率:100 MHz 訪(fǎng)問(wèn)時(shí)間:10 ns 電源電壓-最大:3.6 V 電源電壓-最小:6 V 最大工作電流:35 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-80 封裝:
72235LB25PF8 制造商:Integrated Device Technology Inc 功能描述:FIFO Mem Sync Dual Depth/Width Uni-Dir 2K x 18 64-Pin TQFP T/R 制造商:Integrated Device Technology Inc 功能描述:FIFO SYNC DUAL DEPTH/WIDTH UNI-DIR 2KX18 64TQFP - Tape and Reel
72235LB25PFG 制造商:Integrated Device Technology Inc 功能描述:FIFO SYNC DUAL DEPTH/WIDTH UNI-DIR 2KX18 64TQFP - Bulk
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